Modulo 2+1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2+1 adders, based on parallel-prefix carry computation units. CMOS implementati...

Various implementations are known for the efficient implementation of adders. As opposed to traditional optimization techniques a statistical approach using early termination detection is used in this article to obtain efficient implementations for large operands. The completion detection logic is described and the efficiency of the approach is shown and analyzed analytically and through comput...

We discuss a system of autocatalytic sequences of binary numbers. Sequences come in two forms, a 1-dimensional form (operands) and a 2-dimensional form (operators) that are able to react with each other. The resulting reaction network shows signs of emerging metabolisms. We discuss the general framework and examine speciic interactions for a system with strings of length 4 bits. A self-maintain...

handy systematic method for enumerating all possible data dependency cases that could occur between any two instru c-tions that might happen to be processed at the same time at different stages o f the pipeline. Given instructions of the instruction set, specific information about operands of each instruction and when an instruction reads or writes data, the method could be used to enumerate al...

This paper presents the design redundant Binary multiplier for 32*32bit number multiplication. Modern computer system is a dedicated and very high speed unique multiplier. Therefore, this paper presents the design a Redundant Binary multiplier. The proposed system generates M, N and interconnected blocks. By extending bit of the operands and generating an additional product the proposed system ...

We present algorithms for computing the cube of an ideal in an imaginary quadratic number field or function field. In addition to a version that computes a non-reduced output, we present a variation based on Shanks’ NUCOMP algorithm that computes a reduced output and keeps the sizes of the intermediate operands small. Extensive numerical results are included demonstrating that in many cases our...

We detail a procedure for the computation of the polynomial form of an electronic combinational circuit from the design equations in a truth table. The method uses the Buchberger algorithm rather than current traditional methods based on search algorithms. We restrict the analysis to a single output, but the procedure can be generalized to multiple outputs. The procedure is illustrated with the...

We discuss adaptive enumeration and rendering methods for implicit surfaces , using octrees computed with aane arithmetic, a new tool for range analysis. AAne arithmetic is similar to standard interval arithmetic, but takes into account correlations between operands and sub-formulas, generally providing much tighter bounds for the computed quantities. The resulting octrees are accordingly much ...

This paper presents an e cient hardware algorithm for variable precision division The algorithm is based on a well known convergence algorithm however modi cations are made to allow it to e ciently handle variable precision operands The proposed al gorithm reduces the number of xed precision operation by only computing signi cant words in intermediate results Compared to previous variable preci...

This paper describes how ari thmetic expressions are evaluated in NAPSS . A brief discussion is included covering the types of expressions permi t ted and where the dist inct ive operands arise. First , the flow through the ari thmetic expression evaluator is given for arithmetic expressions which do not involve recursion , function evaluation or polyalgorithm cal ls. The handl ing of each of t...