نتایج جستجو برای: random bit generator

تعداد نتایج: 371039  

2013
Kalikinkar Mandal Xinxin Fan Guang Gong

A pseudorandom number generator is an important component for implementing security functionalities on RFID tags. Most previous proposals focus on true random number generators that are usually inefficient for low-cost tags in terms of power consumption, area, and throughput. In this contribution, we propose a lightweight pseudorandom number generator (PRNG) for EPC Class-1 Generation-2 (EPC C1...

Journal: :CoRR 2015
Evan Saulpaugh

The XCRUSH family of non-Feistel, ARX block ciphers is designed to make efficient use of modern 64-bit general-purpose processors using a small number of encryption rounds which are simple to implement in software. The avalanche function, which applies one data-dependent, key-dependent rotation per 64-bit word of plaintext per round, allows XCRUSH to produce an almost totally diffuse 256-bit bl...

2002
C. Meenakarn A. Thanachayanont

This paper describes the design and implementation of a single-chip digitally synthesized 0-35 MHz agile function generator. The chip comprises an integrated direct digital synthesizer (DDS) with a 10-bit onchip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-μm CMOS technology. The main features of the chip include maximum clock frequency of 100 MHz at 3.3-V supp...

Journal: :Bio Systems 2000
R D Hangartner P Cull

In this paper, we address the question, can biologically feasible neural nets compute more than can be computed by deterministic polynomial time algorithms? Since we want to maintain a claim of plausibility and reasonableness we restrict ourselves to algorithmically easy to construct nets and we rule out infinite precision in parameters and in any analog parts of the computation. Our approach i...

2012
A. Beirami H. Nejati W. H. Ali

In this letter, we present a circuit implementation for the discrete-time zigzag map, which exhibits high speed, low power consumption, and above all resilience to process variations. Circuit parameter variations result in alteration of the chaotic map parameters, such as the slope and the location of the breakpoints in the map, which in turn degrade the randomness of the generated bit sequence...

1995
Gene W. Marsh

1. To approach channel capacity, it is desirable to make the signal more noiselike.Therefore, we introduce a random number generator, to make the modulation appear random C. A closer look at the modulator/demodulator.1 1. In the standard modulator pair shown in Figure 3, a bit determines whether the transmit filter or its inverse is emitted every seconds. The waveform then passes through the ch...

Journal: :CoRR 2007
Richard P. Brent

A pseudo-random number generator (RNG) might be used to generate w-bit random samples in d dimensions if the number of state bits is at least dw. Some RNGs perform better than others and the concept of equidistribution has been introduced in the literature in order to rank different RNGs. We define what it means for a RNG to be (d,w)-equidistributed, and then argue that (d,w)-equidistribution i...

2016
G. Dhanya

OFDM scrambling is one of the most popular techniques for secure communication. This paper proposes a new scrambling technique based on random permutation with the pseudo random binary generator to improve the performance of OFDM scrambler. To measure the intelligibility of speech, speech transmission index (STI) and common intelligibility scale (CIS) are used. The Bit Error Rate (BER) and Sign...

Journal: :Journal of The Optical Society of America B-optical Physics 2022

The prototype quantum random number (random bit) generator (QRNG) consists of one photon at a time falling on 50:50 beam splitter followed by detection in or the other output beams due to irreducible probabilistic nature mechanics. Due difficulties producing single photons demand, practice, pulses weak coherent (laser) light are used. In this paper, we take different approach, that uses moderat...

Journal: :J. Inf. Sci. Eng. 2011
Tsu-Wei Tseng Jin-Fu Li

Variability in transistor performance will continue to increase with the scaling of technology. Transistors are more and more unreliable. Also, the noise-tolerant capability of circuits is less and less robust. To avoid the loss of yield and fault coverage, the design-for-testability circuit must be designed to be noise-tolerant. This paper presents a soft-error tolerant built-in self-test (SET...

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