نتایج جستجو برای: systolic array

تعداد نتایج: 185077  

Journal: :IEEE Transactions on Parallel and Distributed Systems 1992

Journal: :IEICE Transactions 2010
Stanislav G. Sedukhin Toshiaki Miyazaki Kenichi Kuroda

The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this paper, we present a new 3-dimensional (3D) orbital algebraic path algorithm and corresponding 2-D toroidal array processors which solve the n × n APP in the theoretically minimal number of 3n time-steps. The coordinated time-space schedu...

1989
Reiner W. Hartenstein Alexander G. Hirschbiel Michael Weber

A method SYS 2toMoM to map systolic systems onto the MoM ( m apo riented m achine) is introduced in this paper. This mapping method is needed to derive a methodology of MoM application development support from the theory of systolic array synthesis. The MoM is a flexible non-von-Neumann computer principle having been developed at Kaiserslautern. MoM "programming" uses combinational code (for pa...

2009
Octavian CREŢ Zsolt MATHE Paul CIOBANU Sonia MĂRGINEAN Adrian DĂRĂBANT

This paper introduces an algorithm for DNA string detection and proposes an efficient hardware implementation of it on FPGA devices. Its main application field is intended to be the detection of intron and exon strings in DNA chains, but its applicability is not limited to Genetics. The GenDiv algorithm is based on the dynamic programming method. For the software implementation, the algorithm’s...

Journal: :CSSP 2015
I. Mamatha T. S. B. Sudarshan Shikha Tripathi Nikhil Bhattar

Realization of N-point Discrete Fourier Transform (DFT) using one-dimensional or two-dimensional systolic array structures have been developed for power of two DFT sizes. DFT algorithm, which can be represented as a triple -matrix product, can be realized by decomposing N into smaller lengths. Triple matrix product form of representation enables to map the Npoint DFT on a 2-D systolic array. In...

Journal: :EURASIP J. Adv. Sig. Proc. 2006
Abbas Bigdeli Morteza Biglari-Abhari Zoran A. Salcic Yat Tin Lai

A new pipelined systolic array-based (PSA) architecture for matrix inversion is proposed. The pipelined systolic array (PSA) architecture is suitable for FPGA implementations as it efficiently uses available resources of an FPGA. It is scalable for different matrix size and as such allows employing parameterisation that makes it suitable for customisation for application-specific needs. This ne...

2015
F Bitz H. T. Kung

Given a map in which each position is associated with a travcrsability cost, the path planning problem is to find a minimum-cost path from a source position to every other position in the map. The paper proposes a dynamic programming algorithm to solve the problem, and analyzes the exact number of operations that the algorithm takes. The algorithm accesses the map in a highly regular way, so it...

Journal: :VLSI Signal Processing 1990
R. Schreiber

We give a systolic algorithm and array for bidiagonalization of an n x n matrix in O(nlog, n) time, using O(n2) cells. Bandedness of the input matrix may be effectively exploited. If the matrix is banded, with p nonzero subdiagonals and q nonzero superdiagonais, then 4n In(p + q) + O(n) clocks and 2n(p + q ) + O((p + q)’ + n) cells are needed. This is faster than the best previously reported re...

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