Comparing the performance of a set of activities or organizations under uncertainty environment has been performed by means of Fuzzy Data Envelopment Analysis (FDEA) since the traditional DEA models require accurate and precise performance data. As regards a method for dealing with uncertainty environment, many researchers have introduced DEA models in fuzzy environment. Some of these models ar...

In this paper, we prove Hyers-Ulam-Rassias stability of $C^*$-ternary algebra homomorphism for the following generalized Cauchy-Jensen equation $$eta mu fleft(frac{x+y}{eta}+zright) = f(mu x) + f(mu y) +eta f(mu z)$$ for all $mu in mathbb{S}:= { lambda in mathbb{C} : |lambda | =1}$ and for any fixed positive integer $eta geq 2$ on $C^*$-ternary algebras by using fixed poind alternat...

Properties of ternary semigroups, groups and algebras are briefly reviewed. It is shown that there exist three types of ternary units. A ternary analog of deformation is shortly discussed. Ternary coalgebras are defined in the most general manner, their classification with respect to the property “to be derived” is made. Three types of coassociativity and three kinds of counits are given. Terna...

A study and comparison between current mode CMOS analog multiplier, CMOS current mode multiplier/divider and high frequency four quadrant current multiplier has been carried out in this paper. Current multiplier has been simulated in SPICE with 0.35μm, 0.5μm. Simulation have been done with supply voltage of 3.3V, 1.5V and 1.55V respectively. The simulated results show that characteristic of mul...

Galois Field Sum of Products (GFSOP) leads to efficient multi-valued reversible circuit synthesis using quantum gates. In this paper, we propose a new generalization of ternary Toffoli gate and another new generalized reversible ternary gate with discussion of their quantum realizations. Algorithms for synthesizing ternary GFSOP using quantum cascades of these gates are proposed. In both the sy...

Reversible logic has attracted tremendous interest among the researchers in low power VLSI field due to their simple structure and improved energy efficiency. In this paper, the implementation of an 8-bit low power multiplier based on reversible gate technology is reported. The structure of the reversible gate multiplier consists of following components: the first part is the reversible partial...

We show that the assumption n1 > λ in the Second Multiplier Theorem can be replaced by a divisibility condition weaker than the condition in McFarland’s multiplier theorem, thus obtaining significant progress towards the multiplier conjecture.

Article history: Received Accepted Available online 20 Nov. 2014 19 Dec. 2014 25 Dec. 2014 Based on the simplification of the addition operations in a low-power bypassing-based multiplier, a low-cost low-power bypassing-based multiplier is proposed. Row-bypassing multiplier, column-bypassing multiplier, 2-Dimensional bypassing multiplier and braun multipliers are implemented in CMOS and GDI tec...

In this paper we shall study the multipliers on Banach algebras and We prove some results concerning Arens regularity and amenability of the Banach algebra M(A) of all multipliers on a given Banach algebra A. We also show that, under special hypotheses, each Jordan multiplier on a Banach algebra without order is a multiplier. Finally, we present some applications of m...

This paper proposes a novel recursive structure block-based Wallace tree multiplier with the capability to tune its accuracy based on the precision and power requirements. The multiplier performs multiplication operations recursively from small blocks to large blocks, with a fine grain capability of turning off small blocks to trade off with power. By tuning the fidelity design “knob”, we show ...