نتایج جستجو برای: unilateral transistor model

تعداد نتایج: 2155669  

2007
Michael C. Hollenbeck Hoda Abdel-Aty-Zohdy Ronald Brower Robert Ewing Kenneth Stevens

Novel organic transistors utilizing acid/alkaline chemistry have been investigated for their unique device chemistry and customizability. The research presented here shows a multiphysics model for a polymerelectrolyte transistor (PET) simulated in COMSOL Multiphysics. Dynamic transient response and current-voltage characteristics are determined from multiple simulations of an alkaline-acid-alka...

2007
Dinesh Patil Mark Horowitz

In this paper, we describe a method for joint supply, threshold voltage and sizing optimization, in presence of uncertain transistor parameters, to obtain robust energy-delay optimal designs. We extend our previous work on robust transistor sizing, which accounted for the added delay caused by transistor variations by adding margins on each gate delay proportional to the estimated delay variabi...

Journal: :IEICE Transactions 2011
Hiroaki Konoura Yukio Mitsuyama Masanori Hashimoto Takao Onoye

PMOS stress (ON) probability has a strong impact on circuit timing degradation due to NBTI effect. This paper evaluates how the granularity of stress probability calculation affects NBTI prediction using a state-of-the-art long term prediction model. Experimental evaluations show that the stress probability should be estimated at transistor level to accurately predict the increase in delay, esp...

2012
Arash Dehzangi A Makarimi Abdullah Farhad Larki Sabar D Hutagalung Elias B Saion Mohd N Hamidon Jumiah Hassan Yadollah Gharayebi

The junctionless nanowire transistor is a promising alternative for a new generation of nanotransistors. In this letter the atomic force microscopy nanolithography with two wet etching processes was implemented to fabricate simple structures as double gate and single gate junctionless silicon nanowire transistor on low doped p-type silicon-on-insulator wafer. The etching process was developed a...

1999
Spiridon Nikolaidis Alexander Chatzigeorgiou

A detailed analysis of the transistor chain operation in CMOS gates is introduced. The chain is modeled by a transistor pair, according to the operating conditions of the structure. The system of differential equations for the derived chain model is solved and analytical expressions which accurately describe the temporal evolution of the output voltage are extracted. For the first time, a fully...

2004
Elena V. Efremova Alexander D. Khilinsky

In this report the problem of forming chaotic signals with prescribed spectrum is discussed. An approach to construction of single-transistor chaotic oscillators with preassigned spectrum on the basis of “active component (transistor) – passive quadripole closed in feedback loop” structure is proposed. On example of capacitive three-point oscillator it is shown that in the oscillator with such ...

2017
Chih-Chiang Wu

This paper presents a simple behavioral model with experimentally extracted parameters for packaged cascode gallium nitride (GaN) field-effect transistors (FETs). This study combined a level-1 metal–oxide–semiconductor field-effect transistor (MOSFET), a junction field-effect transistor (JFET), and a diode model to simulate a cascode GaN FET, in which a JFET was used to simulate a metal-insulat...

Journal: :JCP 2009
Abdul Kadir Kureshi Mohd. Hasan

This paper present new energy efficient methods of designing switches and routing interconnects inside FPGA using novel variants of Dynamic Threshold MOS (DTMOS) instead of traditional NMOS pass transistor based switches and interconnects. The extra needed transistors can be easily shared, in multiplexer based routing architecture of FPGA, keeping area overhead to be minimum. Extensive transist...

2003
Ki-Whan Song Kyung Rok Kim Jong Duk Lee Byung-Gook Park Sang-Hoon Lee Dae Hwan Kim

A SPICE (simulation program with integrated circuit emphasis) model for a single-electron transistor (SET) was developed based on the physical phenomena in realistic Si SETs and was implemented into a conventional circuit simulator. In the proposed model, the SET current calculated using an analytic model is combined with the parasitic MOSFET (metal-oxide semiconductor field effect transistor) ...

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