Abstarct The work presents the newly deploying technology in semiconductor industry called silicon on insulator (SOI). Its two technology partially and fully depleted SOI and describe how these are different from conventional bulk MOS technology, advantages over bulk technology and floating body effect of PD/FD SOI technology, factors effecting floating body such as kink effects in PD SOI, para...

This paper analyze the soft error tolerance related to layout structures on 65-nm bulk and SOI processes. The layout structure in which well contacts are placed between redundant latches suppresses MCU effectively. Also the tolerance of SOI structure transistor is estimated by TCAD simulations. The charge collection mechanism is suppressed by the BOX (Buried Oxide) in SOI transistor. Charge sha...

This paper introduces a novel silicon-on-insulator (SOI) metal–semiconductor field-effect transistor (MESFET) with an implanted N layer (INL-SOI MESFET) to improve the DC and radio frequency characteristics. The DC and radio frequency characteristics of the proposed structure are analyzed by the 2-D ATLAS simulator and compared with a conventional SOI MESFET (C-SOI MESFET). The simulated result...

The fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is the first model for circuit simulation based on a complete surface-potential description. HiSIM-SOI solves the surface potentials at all three SOI-surfaces perpendicular to the channel surface self-consistently. Besides verification against measured I-V characteristics, HiSIM-SOI is also verified with a 1/f noise analysis, ...