The problem of contention for routers and links is one of the critical problems caused by the NoC (network-on-chip) reuse approach in testing NoC systems. In this paper, we propose zigzag connected subgraph partition approach to avoid the contention for routers and links in NoC testing. Then, a MMQEA (multi-population multi-nary quantum-inspired evolutionary algorithm) strategy, which incorpora...

A new NoC (network on chip) architecture using lossless data compression and decompression to improve the performance and power efficiency of the on-chip interconnect is proposed. In the proposed NoC scheme, the sender compresses the data to be transferred in order to reduce the number of data packets and the receiver decompresses the encoded data to restore the original data. For the lossless ...

Nowadays, network-on-chip (NoC) systems are becoming more popular due to their big advantages when compare with systems-on-chip (SoC). Therefore, an increasing number of researchers and organizations now focus on the study and development of NoC techniques. As a result, so far many achievements have been gained. Furthermore, considering the dominant position of wireless and the weakness of wire...

mRNA poly(A) tails are important for mRNA stability and translation, and enzymes that regulate the poly(A) tail length significantly impact protein profiles. There are eleven putative deadenylases in mammals, and it is thought that each targets specific transcripts, although this has not been clearly demonstrated. Nocturnin (NOC) is a unique deadenylase with robustly rhythmic expression and los...

SoC communication infrastructures, such as the Æthereal network on chip (NoC), will play a central role in integrating IPs with diverse communication requirements. To achieve a compositional and predictable system design, it is essential to reduce uncertainties in the interconnect, such as throughput and latency. In our NoC, these uncertainties are eliminated by providing guaranteed throughput ...

More and more complex and larger system on chips are getting developed as a result of increase in chip density following Moore’s law. Advanced SoCs have in their shelf significantly noticeable communication mechanisms. NoC has solved the scalability problems to a larger extent compared to bus based interconnect. NoC has been providing a back bone infrastructure for System-on-chips since long. A...

A new chip design paradigm called Network on Chip (NOC) offers a promising architectural choice for future systems on chips. NOC architectures offer a packet switched communication among functional cores on the chip. NOC architectures also apply concepts from computer networks and organize on-chip communication among cores in layers similar to OSI reference model. We constructed a protomodel us...

Exchange mapping locates the dominant mutation Scutoid to the right of Adh on chromosome arm 2L of D. melanogaster. However, deletion mapping indicates that Sco is to the left of Adh. The phenotype of Sco is sensitive to mutation, or deletion, of noc+ and of three genes, el, l(2)br22, and l(2)br29 mapping immediately distal to noc. The four contiguous loci, el, l(2)br22, l(2) br29 and noc, alth...

Creating Network on Chip is done here, we present a new network-on-chip (NoC) that handles accurate localizations of the faulty parts of the NoC. The implemented design NoC is based on new error detection mechanisms suitable for dynamic NoCs, where the number and position of processor elements or faulty blocks vary during runtime. Indeed, We designed a online detection of data packet and adapti...

Network-on-Chip (NoC) based Multi-Processor System-on-Chip (MPSoC) architecture is a promising SoC design solution, offering high computational power with lots of flexibilities. However, finding the optimal MPSoC architecture configuration remains an enormous challenge due to its high structural complexity and functional diversity. In this paper, we introduce a Transaction level NoC SIMulator (...