Micromachining techniques are being increasingly used to develop miniaturized sensor and actuator systems. These system designs tend to be captured as layout, requiring extraction of the equivalent microelectromechanical circuit as a necessary step for design verification. This paper presents an extraction methodology to (re-)construct a circuit schematic representation from the layout, enablin...

In this paper a new 8-bit 50-Msample/s CMOS digital-to-analog converter (DAC) is presented. The circuit employs 9 operational transconductance amplifiers (OTAs) and CMOS transistors as switching circuit. The proposed DAC is simulated using SPICE simulation program with 3μm CMOS technology. Simulation results shows verify good performance of the circuit.

This paper proposes a nonlinear oscillator network model for gray-level image segmentation suitable for massively parallel VLSI implementation. The model performs image segmentation in parallel using nonlinear analog dynamics. Because of the limited calculation precision in VLSI implementation, it is important to estimate the calculation precision required for proper operation. By numerical sim...

A switched capacitor circuit which simulates Frequency Dependant Negative Resistor is proposed. The circuit is controlled by three phases clock and needs one unity gain buffer. A comparison among SC FDNRs in other references is shown. SWITCAP simulation of SC filter using these circuits are also shown. Key-Words; Switched-Capacitor(SC) Frequency Dependant Negative Resistor(FDNR) Filter immittan...

Transistor-level circuit simulation is a fundamental computer-aided design technique that enables the design and verification of an extremely broad range of integrated circuits. With the proliferation of modern parallel processor architectures, leveraging parallel computing becomes a necessity and also an important avenue for facilitating large-scale circuit simulation. This monograph presents ...

This paper introduces a peculiar approach of designing Static Random Access Memory (SRAM) memory cell in Quantum-dot Cellular Automata (QCA) technique. The proposed design consists of one 3-input MG, one 5-input MG in addition to a (2×1) Multiplexer block utilizing the loop-based approach. The simulation results reveals the excellence of the proposed design. The proposed SRAM cell achieves 16% ...

We propose a new approach to parallelizing fault simulation in which the test set is partitioned among the available processors. The approach can be used for any of the sequential circuit fault simulation algorithms commonly used, and it can be implemented on various diierent parallel architectures. This approach for the rst time overcomes the limitations of serial logic simulation. In addition...

Electric circuit analysis determines the voltage and current distribution in an electric circuit due to applied source voltages or currents. In a static (DC) electric circuit analysis, the voltage and current distribution in an electric circuit is determined that is subjected to applied DC source voltages or currents. In a harmonic (AC) electric circuit analysis, the voltage and current distrib...

SPICE-compatible equivalent circuits were developed to facilitate the analysis and envelope simulation of electric circuits driven by modulated signals. The circuits are based on a novel complex phasor-domain transformation. The proposed method facilitates simulation of any general linear circuit driven by a modulated signal such as amplitude modulation, frequency modulation, or phase modulatio...