An active RC filters with a 880 / 1760 MHz dual bandwidth tuning ability is present for 60 GHz unlicensed band applications. A third order Butterworth low-pass filter utilizes two Cherry-Hooper amplifiers to satisfy the very high bandwidth requirements of an amplifier. The low-pass filter is fabricated in 90nm standard CMOS process. Drawing 6.7 mW from 1.2 V power supply, the low frequency gain...

— This paper presents a novel compensation technique for low voltage low power three-stage amplifier driving large capacitive loads. The frequency bandwidth of this amplifier is improved due to usage of dual-active buffers in the efficient compensation network while a feed forward transconductance helps to enhance output large signal response. The paper provides a design procedure by developing...

A fully-active low-noise amplifier (LNA) for ultrawideband application is presented. Passive on-chip inductor of conventional LNA design is replaced by low-noise active inductor, significantly reducing the total chip area of the proposed CMOS LNA. The core LNA circuit is a cascoded common-source amplifier loaded with an active inductor. Two buffer stages are used to provide the required input a...

A compacted and low-offset low-power CMOS amplifier for biosensor application is presented in this paper. It includes a low offset Op-Amp and a high precision current reference. With a novel continuoustime DC offset rejection scheme, the IC achieves lower offset voltage and lower power consumption compared to previous designs. This configuration rejects large DC offset and drift that exist at t...

Robust, high-performance and low-power match-line sense amplifier designs are urgently required to catch up with the new requirements of large-scale CAMs in nano-scale CMOS technologies. In this paper we evaluate the performance of four state-of-the-art match-line sense amplifier designs in terms of power, delay and robustness against temperature, supply voltage and process variations. Our resu...

Abstract—This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The selfbiasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for ga...

This paper presents 10-bit, 1.5 MS/s, 2.5V, Low Power Pipeline analog to digital converter using capacitor coupling techniques. A capacitance coupling folded-cascade amplifier effectively saves the power consumption of gain stages of ADC in a 0.25 μm CMOS technology. The ADC also achieves Low power Consumption by the sharing an op-amp between two successive pipeline stage further reduction of p...

This paper presents the design and performance comparison of a two stage operational amplifier topology using CMOS and BiCMOS technology. This conventional op amp circuit was designed by using RF model of BSIM3V3 in 0.6 μm CMOS technology and 0.35 μm BiCMOS technology. Both the op amp circuits were designed and simulated, analyzed and performance parameters are compared. The performance paramet...

In this research paper, Simulation and Analysis of innovative folded cascode Operational Amplifier based on carbon nanotubes (CNT) has been performed using 45 nm technology. DC voltage gain, average power, bandwidth and output resistance have been computed. CNT based folded cascode Op Amp results in high performance with the increase of CNTs. For example, the increase in DC gain is 41.48% in pC...

Operational amplifiers are an integral part of many analog and mixed signal systems. As the demand for mixed mode integrated circuits increases, the design of analog circuits such as operational amplifiers in CMOS technology becomes more critical. This paper presents a two stage CMOS operational amplifier, which operates at ±1.8V power supply using TSMC 0.18um CMOS technology. The OP-AMP design...