نتایج جستجو برای: critical pathways
تعداد نتایج: 704246 فیلتر نتایج به سال:
Minimizing broadcast latency is one of the most important issues for broadcasting in duty-cycled wireless sensor networks. The existing broadcast schemes do not allow any collision in a schedule to ensure its completion, i.e. all nodes receive a broadcast message collision-freely. A delay of transmission caused by the collision-prevention may increase the broadcast latency if the delay occurs a...
| We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both non-pipelined and functionally pipelined data-paths. The scheduling problem refers to the assignment of a supply voltage level (selected from a xed and known number of voltage levels) to each operation in a data ow graph so as to minimize the average energy consumption for given compu...
Many optimization techniques exist for the hardware implementation of multiplierless linear systems. These methods mainly reduce the number of additions and subtractions by eliminating common subexpressions. These optimizations can increase the critical path of the computations, which is unacceptable for high performance systems. In this work, we present a technique that controls the delay duri...
The purpose of this study was tc identify the relationship between reading Lchievemert and a set of social and individual variables through the use of a critical path analysis. Data, taken from Cycle II of the Naticnal Health Examination Survey, included statistics on a national sample of 7,119 children, ages six through eleven years. Four variables were included in this study: sex, race, age, ...
In a Code Division Multiple Access system operating in a multipath fading channel, a bank of RAKE receivers is needed for each active user at the base station. In this paper, low-power RAKE receivers are proposed that utilize the Strength Reduction (SR) transformation technique. The SR transformation can result in remarkable savings in consumed power and silicon area. A possible disadvantage of...
As semiconductor technology advances, the size of the transistors is shrinking. This technology has reached a point where the potential of transient errors is becoming significant even for combinational logic. Previous efforts to detect such errors have used a general approach applied to the entire circuit. In this project, the error detection efforts are tailored to the specifics of the target...
This paper presents a novel hardware-based approach for identifying, pro ling, and monitoring hot spots in order to support runtime optimization of generalpurpose programs. The proposed approach consists of a set of tightly coupled hardware tables and control logic modules that are placed in the retirement stage of a processor pipeline removed from the critical path. The features of the propose...
Project management methodologies have been the most utilized management tools in today’s industry and the Critical Path Method considers the logical dependencies between related activities that may have to share common resources. This method has then been expanded to allow for the identification of resource-constrained activities and the size of those resources. They are usually called activity...
This paper presents an assessment of the vulnerability of the power grid to blackout using graph topological indexes. Based on a FERC 715 report and the outage reports, the cascading faults of summer WSCC 1996 are reconstructed, and the graphical property of the grid is compared between two cases: when the blackout triggering lines are removed simulating the actual sequence of cascading outages...
In this paper, two general architectures of Carry Select Adder (CSA) have been introduced for high speed addition. These CSA architectures utilize the hybridized structure of Carry Lookahead Adder (CLA) and Ripple Carry Adder (RCA). In these architectures the critical path delay has been reduced by reducing the number of multiplexer stages. The proposed designs are compared with regular CSA bas...
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