A 7-bit Nyquist folding and interpolating analog-to-digital converter (ADC) that converts at 300 MSamples/s is presented. Using current-mode signal processing techniques for analog preprocessing and a front-end sample-and-hold, the proposed 7-bit folding and interpolating ADC yields a wide input bandwidth up to 60 MHz with six effective number of bits. The ADC consumes 200 mW from a 3.3-V power...

We are developing special-purpose, low-power analog-to-digital converters for speech and music applications, that feature analog circuit models of biological audition to process the audio signal before conversion. This paper describes our most recent converter design, and a working system that uses several copies of the chip to compute multiple representations of sound from an analog input. Thi...

We introduce a novel adaptive digital beamforming algorithm for application in cellular CDMA communications systems. A Noniterative Rank-one Signal Subspace eigenstruc-ture Update (NR1SSU) algorithm enables low-complexity re-cursive processing of beamforming weights. A PN chip-level IS-95 CDMA reference model 3] has been used to test the beamforming algorithm via simulation. Our results show th...

This work presents a useful frequency based acquisition method, built in a CypressTM MicroSystems Programmable System on Chip. The acquisition method implemented in the PSoC is a voltage to frequency-code converter based on the classical Indirect Couningt method. The topology of the PSoC performs as a versatile, precise and scalable platform for data acquisition, making the whole system a perfe...

Abstract— Now-a-days Radar Signal Processing system is gaining a great deal of attention for realization of on-chip programmable signal processor for its real time applications. Application specific systems are being implemented using wide spectrum of Digital Signal Processing (DSP) algorithms. Such is the case for COordinate Rotation DIgital Computer (CORDIC) algorithm which is turned out to b...

Field-Programmable Logic (FPL) is on the verge of revolutionizing digital signal processing (DSP) in the manner that programmable DSP microprocessors did nearly two decades ago. While FPL densities and performance have steadily improved to the point where some DSP solutions can be integrated into a single FPL chip, they still have limited use in high-precision high-bandwidth applications. In th...

In this paper, a circuit system of General Purposed Conic Section Function Neural Network is presented. The feed-forward analog computational cells have been designed by using the current mode approach. The network is trained in a chip-in-the-loop fashion with a host computer implementing the training algorithm. The network inputs and the feed-forward signal processing are analog. The mixed ana...