Extrinsic resistance due to lateral extension doping profile can become a performance-limiter in ultrathin body Double-Gate FETs (DGFET). Historically, the intrinsic gate capacitance dominates the capacitance while the channel resistance dominates the total resistance. With devices reduced to nanometer scale, parasitic capacitances and extrinsic resistances significantly affect the device delay...

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In this paper the features of multiple material gate silicon-on-insulator MOSFETs are presented and compared with single material gate silicon-on-insulator MOSFET structures. The results indicate that the multiple material gate structures reduce short channel effects such as drain induce barrier lowering, hot electron effect and better current characteristics in comparison with single material ...

In this article, we study the properties of metal contacts to single-layer molybdenum disulfide (MoS2) crystals, revealing the nature of switching mechanism in MoS2 transistors. On investigating transistor behavior as contact length changes, we find that the contact resistivity for metal/MoS2 junctions is defined by contact area instead of contact width. The minimum gate dependent transfer leng...

The output resistance (hut) is one of the most important device parameters for analog applications. However, it has been difficult to model hut correctly. In this paper, we present a physical and accurate output resistance model that can be applied to both long-channel and submicrometer MOSFETs. Major short channel effects and hot-carrier effect, such as channel-length modulation (0 [l], drain-...

The drain current-voltage (I-V) characteristics of Schottky-barrier carbon nanotube FETs are computed via a self-consistent solution to the 2-D potential profile, the electron and hole charges in the nanotube, and the electron and hole currents. These out-of-equilibrium results are obtained by allowing splitting of both the electron and hole quasi-Fermi levels to occur at the source and drain c...

We propose a new Metal-oxide-semiconductor carbon-nanotube transistor (MOSCNT) in which source (S) and drain (D) regions are formed by band engineered multi-wall carbon nanotubes (BE-MWCNTs). The gradual potential profiles of these band-engineered S/D regions weakening the longitudinal confinements in the channel reduce the band-to-band tunneling significantly and hence eliminating the ambipola...

In this paper, we propose a design of a 0.1 μm single halo (SH) thin film silicon-on-insulator (SOI) nMOSFET device for analogue and mixed signal applications. The single halo structure has a high pocket impurity concentration near the source end of the channel and low impurity concentration in the rest of the channel. The design methodology is based upon the improvement in the short-channel ef...