-With the increasing influence of digital network and communication, armour from perilous intrusion and corruption of information (e.g. image, video, speech etc) during transmission is a paramount issue. To protect the image and video from the unauthenticated access or tampering, watermarking is adopted as a solution. In this paper we have proposed a spatial domain Spread Spectrum (SS) watermar...

An field programmable gate array (FPGA) implementation of independent component analysis (ICA) algorithm is reported for blind signal separation (BSS) and adaptive noise canceling (ANC) in real time. In order to provide enormous computing power for ICA-based algorithms with multipath reverberation, a special digital processor is designed and implemented in FPGA. The chip design fully utilizes m...

1. ABSTRACT Performance requirements for broadband modems continue to push the limits of analog technology. Fortunately, today’s digital–to-analog converters (DACs) are approaching sampling rates in the gigahertz range. These DACs allow broadband modems to implement multichannel solutions completely in the digital domain. To fully utilize the available bandwidth of these DACs, new techniques in...

The FPGA (Field-Programmable Gate Array) implementation of an adaptive filter for narrow band interference excision in Global Positioning Systems is described. The algorithm implemented is a delayed LMS (Least Mean Squares) adaptive algorithm improved by incorporating a leakage factor, rounding and constant resetting of the filter weights. This was necessary as the original adaptive algorithm h...

This paper presents an efficient FPGA based architecture for Sobel edge detection algorithm in respect of both time and space complexity. Various edge detection algorithms are typically used in image processing, artificial intelligence etc. In this paper the Sobel edge detection algorithm using hardware description language and its implementation in Field Programmable Gate Array (FPGA) device i...

In this paper, a networked embedded control of modular robot manipulators without using joint torque sensing is presented. The proposed solution uses an effective control and communication mechanism based on the virtual decomposition control (VDC) approach with embedded FPGA (Field Programmable Gate Array) implementation. A hierarchical master-slaves control structure is used, supported by a hi...

A field programmable gate array (FPGA) implementation of a coprocessor which uses the WSAT algorithm to solve Boolean satisfiability problems is presented. The input is a SAT problem description file from which a software program directly generates a problem-specific circuit design which can be downloaded to a Xilinx Virtex FPGA device and executed to find a solution. On an XCV300, problems of ...

This paper presents an ultra-high-speed correlation processor for FPGA (Field-Programmable Gate Array) which is based on MDF (multiplepath delay feedback) pipelined FFT (fast Fourier transform) architecture. In order to decrease the resource cost and processing delay, the FFT processor is based on DIF (Decimation in Frequency) decomposition method, and the IFFT processor is based on DIT (Decima...

Embedded systems are application-specific computers that interact with the physical world. Reconfigurable technologies provide designers the opportunity to diminish the life-cycle in embedded system creation. The basic purpose of using reconfigurable technologies is for solving the problem of obsolescence. New emerging capabilities in Field Programmable Gate Array (FPGA), including improvements...

This paper describes a novel Field Programmable Gate Array (FPGA) logic synthesis technique which determines if a logic function can be implemented in a given programmable circuit and describes how this problem can be formalized and solved using Quantified Boolean Satisfiability. This technique is general enough to be applied to any type of logic function and programmable circuit; thus, it has ...