نتایج جستجو برای: four quadrant analog multiplier

تعداد نتایج: 691265  

2006
AV Kostenko RJ Hyndman

a simple rule to be implemented. We suggest that a simple but more accurate rule can be derived by dividing the quadrant diagonally into two. In this case, the rule is to use SBA whenever v42 (3/2)p. This approximation is also shown in Figure 2. Since a is usually small (less than 0.3) for intermittent demand data, this approximation is quite good. In any case, the comparative advantage of one ...

2002
Heejong Yoo Rich Ellis David V. Anderson Paul Hasler David W. Graham Mat Hans

In this paper, we present a real–time noise suppression system implemented with analog VLSI. The algorithm implemented is designed to reduce stationary background noise in single– microphone signals while preserving the non–stationary signal component. Because the system relies on analog computation rather than digital, it has benefits such as extremely low power consumption and real-time compu...

2015
Kirti Gupta Neeta Pandey Maneesha Gupta

In this paper, a new architecture for MOS Current Mode Logic (MCML) array multiplier for mixed-signal applications is proposed. The proposed architecture employs active shunt-peaking technique in conventional MCML circuits. The technique of active shunt-peaking offers a way for increasing the speed of MCML gates. The performance of the proposed MCML array multiplier is compared with the convent...

Journal: :International journal of ophthalmology 2015
Firat Helvacioglu Osman Murat Uyar Sadik Sencan Zeki Tunc Ziya Kapran

AIM To evaluate the effect of misalignment on the measurements of retinal nerve fiber layer (RNFL) by spectral-domain optical coherence tomography (OCT). METHODS A total of 42 eyes from 21 healthy young subjects underwent RNFL measurements with RTVue spectral-domain OCT (Optovue Inc., Fremont, California, USA). Two baseline measurements with perfectly aligned central circle to the borders of ...

1998
I. Baturone S. Sánchez Solano J. L. Huertas

Combination of A/D-D/A converters allows implementing both long-term analog memory and multiplier/divider operations. An efficient design based on continuous-time, current-mode, dividing-algorithmic converters is presented in this paper. It offers high-speed and low-voltage operation with low or middle resolution. Experimental results of two CMOS-2.4μm prototypes (with 5and 7-bit data converter...

2017
Eric Ouellet Ian McShane Avivah Litan

1999
Marco Brambilla Daniele Guidi Valentino Liberali

This paper describes a multistage FIR decimation filter implemented with a multiplier-free architecture. The filter is designed to be used in A/D converters in submicron CMOS technology. The proposed architecture aims at increasing the operation speed while limiting the power dissipation, thus reducing the injection of switching noise into the substrate and the digital/analog crosstalk.

Journal: :Environmental Health Perspectives 1980
G C Stafford

Differences in recording positive and negative ion chemical ionization mass spectra on a quadrupole mass spectrometer are discussed. An analog positive and negative ion electron multiplier detector is described which is well suited for a quadrupole instrument. This detector significantly reduces baseline noise in the negative ion mode and improves positive ion high mass sensitivity.

2007
P. Riaud

In the rst article (Rouan et al. 2000) we have described the principle of a coronagraph utilizing a four-quadrant phase-mask and the results of numerical simulations obtained in the perfect case. In this second article, we have performed additional numerical simulations to assess in more detail the performances and limitations of this coronagraph under real conditions. The eeect of geometrical ...

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