The power-delay product is a direct measurement of the energy expanded per operational cycle of an arithmetic circuit. Lowering the supply voltage of the full adder cell to achieve low power-delay product is a sensible approach to improve the power efficiency at sustainable speed of arithmetic circuits composed of such instances at high level design. In this paper, a novel design of a low power...

Full adder is the functional building block and basic component in several architectures found in VLSI and DSP applications, Adder is a versatile component and mainly used in addition and multiplication as the basic processing element; Adder in a VLSI application is used in ALU design, Address generation in processors, Multipliers and so on. In DSP applications it is used code for conversion, S...

Different adder circuits are elementary blocks in many contemporary integrated circuits, which are not only employed to perform addition operations, but also other arithmetic operations such as subtraction, multiplication and division. Full adder is the basic building block of any adder circuit. Area, speed and power are the three main design metrics for any VLSI circuit. In this work, eight di...

In this paper, interesting full adder circuits are reviewed and compared concerning speed, power consumption, and silicon area. A modified full adder is also investigated by combining hybrid logics, namely, pass transistor logic and branch based logic. This architecture uses two independent parts to generate SUM and carry signals. The results show that ultra low power evolution, very small prop...

The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been inve...

   Nowadays, the portable multimedia electronic devices, which employ signal-processing modules, require power aware structures more than ever. For the applications associating with human senses, approximate arithmetic circuits can be considered to improve performance and power efficiency. On the other hand, scaling has led to some limitations in performance of nanoscale circuits. According...

This paper presents a method to Designing Ripple Carry Adder using CMOS Full-Adders for Energy-Efficient Arithmetic Applications. We present two high-speed and low-power full-adder cells de-signed with an alternative internal logic structure and pass-transistor logic styles that lead to have a reduced powerdelay product (PDP). We carried out a comparison against other full-adders reported as ha...

Quantum-dot cellular automata (QCA) is a newly-developed nanotechnology for next-generation nanoelectronic circuits. QCA circuits use the propagation of charge polarity in QCA cells to pass information without any current being involved. It has the advantages of extremely small size, low power consumption, high device density and twinkling operation process. Nanofabrication of QCA circuits may ...

This paper presents a comparative research of low-power and high-speed full adder cells which are based on XOR-XNOR algorithm. The adder cells are decomposed into small modules and all of them have an in-depth analysis. Several designs of each of them are implemented, optimized, simulated and analyzed separately. We also design a novel XORXNOR module built upon bootstrapped pass transistor logi...