This paper describes an improved transformational approach to the scheduling problem in high-level synthesis. Based on an existing approach called SALSA [NES90], it uses more powerful transformations and lower bounds on scheduling cost to quickly find highquality schedules of data-oriented Control-Data Flow Graphs. Results show the ability to find very good schedules for difficult scheduling pr...

This paper introduces a general scheme for formally embedding high level synthesis by formulating its basic steps as transformations within higher order logic. A functional representation of a data ow graph is successively reened by means of generic logical transformations. Algorithms that are based on logical transformations guarantee \correctness by design". They not only construct an impleme...

Behavioral synthesis, which automatically synthesizes an RTL circuit from a sequential program, is one of promising technologies to improve the design productivity. This paper proposes a function call optimization method in behavioral synthesis from large sequential programs with a number of functions. We formulate the optimization problem using integer linear programming. Our experimental resu...

A new probabilistic algorithm, called Probabilistic Rejectionless Anti-Voter (PRAV), is introduced. Due to its property to concentrate computational efforts on places where there are the greatest chances for the improvement of an objective function and due to the employed rejectionless mechanism a significant speed-up over other probabilistic methods is achieved The extensive superior experimen...

The focus of high-level built-in self-test (BIST) synthesis is register assignment, which involves system register assignment, BIST register assignment, and interconnection assignment. To reduce the complexity involved in the assignment process, existing high-level BIST synthesis methods decouple the three tasks and perform the tasks sequentially at the cost of global optimality. They also try ...

i^/icunLTif ()i;iii^(jirfE3EiiiN(] / irfD /Lppi.iE3D !Sc:[Er«:E ElLIECrriROfTICZS /Iff!) C:C)MI»LrrER SCIENBCE Doctor of Philosophy MULTIPLE OBJECTIVE OPTIMISATION OF DATA AND CONTROL PATHS IN A BEHAVIOURAL SILICON COMPILER by Keith Richard Baker The objective of this research was to implement an "intelligent" silicon compiler that provides the ability to automatically explore the design space ...

In high-level synthesis, parallelization for nested loop kernels has been hard due to their complex data dependencies, especially non-uniform dependencies. In this paper, we propose a new method to synthesize a parallelized circuit from such kernels using polyhedral optimization, which has been vigorously studied in the software field. The key point of our contribution is a buffering method for...

Although there are widely known solutions for dataflow-dominated resource constrained high-level synthesis (HLS) problems, optimization of hardware resources under time-constraints in controlintensive systems is still a challenge. This paper examines the case when functional pipelining is used to increase the throughput of the system. The traditional concept of mutually exclusive conditional br...

SUMMARY As well as the schedule affects system performance, the control skew, i.e., the arrival time difference of control signals between registers, can be utilized for improving the system performance, enhancing robustness against delay variations, etc. The simultaneous optimization of the control step assignment and the control skew assignment is more powerful technique in improving performa...