In the near future of high component density and low-power technologies, soft errors occurring not only in memory systems and latches but also in the combinational parts of logic circuits will seriously affect the reliable operation of integrated circuits. This paper presents a novel design style which reduces the impact of radiation-induced single event transients (SET) on logic circuits, and ...

Dynamic domino logic circuits are widely used in modern digital VLSI circuits. These dynamic circuits are often favored in high performance designs because of the speed advantage offered over static CMOS logic circuits. The main drawbacks of dynamic logic are a lack of design automation, a decreased tolerance to noise and increased power Consumption. Dynamic CMOS circuits, featuring a high spee...

Enabled by the emerging three-dimensional (3D) integration technologies, 3D integrated computing platforms that stack high-density DRAM die(s) with a logic circuit die appear to be attractive for memory-hungry applications such as multimedia signal processing. This paper considers the design of motion estimation accelerator under a 3D logic-DRAM integrated heterogeneous multi-core system framew...

Producing a functionally correct integrated circuit is becoming increasingly difficult. No matter how careful a designer is, there will always be integrated circuits that are fabricated, but do not operate as expected. Providing a means to effectively debug these integrated circuits is vital to help pin-point problems and reduce the number of re-spins required to create a correctly-functioning ...

With the increasing non-recurring engineering cost of advanced process technologies, reconfigurable devices have received great attention in small and medium-volume integrated circuit designs. However, low logic diversity and slow timing performance limit the efficacy of field-programmable gate array (FPGA) and complex programmable logic device (CPLD). In this paper, we propose an efficient hyb...

Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except for some particular wires). Such asynchronous circuits offer high robustness but do not perform well to automatically synthesize and optimize. This paper presents a new methodology to model and synthesize data path QDI circuits. The model used to represent circuits is based on Multi-valued Decisio...

Biological circuits are developed as biological parts within a cell to carry out logical functions resembling those studied in electronics circuits. These circuits can be performed as a method to vary cellular functions, to develop cellular responses to environmental conditions, or to regulate cellular developments. This research explored the possibility of synthetic biology based on the geneti...

CMOS is used to construct the integrated circuits with low level of static leakage. With this low level leakage we are designing all the transistor circuits in CMOS logic. To control this static leakage in the circuits the supply voltage is a major concern. Here the step-up converters with charge pump and the level for maintaining its threshold voltage (VT) is to be analyzed and proposed. Here ...

The design of Multiple Valued Logic (MVL) digital circuits is performed by increasing the representation domain from the two level (N=2) switching algebra to N > 2 levels. Universal sets of MVL CMOS gates allow the synthesis and implementation of any MVL digital circuit. This paper proceed with: 1) the design and implementation of a universal set of IC gates, CMOS 0.25 um technology, that carry...

VLSI Design looking towards to solve design constructions that arises when using clock pulses. The majority of the constrains can be overcome by using asynchronous logic, additionally synchronous circuits has some inherent advantages over synchronous counterparts. This paper demonstrates the design of efficient asynchronous pipelines for some standard logic circuits and medium scale integration...