We evaluated effect of dual gene silencing of Hsp27 and c-FLIP in doxazosin-induced apoptosis of PC-3 cell. After transfection using Hsp27 and c-FLIP siRNA mixture (dual silencing), doxazosin treatment was done at the concentrations of 1, 10, and 25  μ M. We checked apoptosis of PC-3 cells with and TUNEL staining. We also checked interaction between Hsp27 and C-FLIP in the process of apoptosis ...

A UART (Universal Asynchronous Receiver and Transmitter) is a device allowing the reception and transmission of information, in a serial and asynchronous way. This project focuses on the implementation of UART with status register using multi bit flip-flop and comparing it with UART with status register using single bit flip-flops. During the reception of data, status register indicates parity ...

Great efforts have been made to develop novel and efficacious therapeutics against pancreatic cancer to improve the treatment outcomes. Tumor-necrosis factor-related apoptosis-inducing ligand (TRAIL) is such a therapeutic cytokine with selective killing effect toward malignant cells. However, some human pancreatic cancers are intrinsically resistant to TRAIL-mediated apoptosis or therapy. In th...

In this paper, a low voltage dual-pulse-clock double edge triggered D'flip-flop (DPDET) is proposed. The DPDET flip-flop uses a split output latch clocked by a short pulse train. Compared to the previously reported double edge triggered flip-flops, the DPDET flip-flop uses only six transistors with two transistors being clocked, operating correctly under low supply voltage. The total transistor...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. The use of dual edge-triggered flip-flops can help reduce the clock frequency to half of the single edge-triggered flip-flops while maintaining the same data throughput, this thereafter translates to better performance in terms of both power dissipation and speed. Pulsetriggered flip-f...

Flip-flops are essential elements of a design from both delay and energy aspects. A significant fraction of the total power in highly synchronous systems 1s dissipated over clock networks. Hence, lowpower clocking schemes are promising approaches for future desfgns. Recently, there has been published several energy recovery flip-flops that enable energy recovery from the clock network, resultin...

Introduction Steady state free precession (SSFP) imaging is used in widespread applications such as breath-hold MRI examinations of the abdomen and cardiac due to its very high signal-sampling efficiency and good tissue contrast. SSFP imaging at a high static field strength of 3 T and greater often suffers from specific absorption rate (SAR) problems because a high flip angle and short repetiti...

Recently, the logic-qubit entanglement shows its potential application in future quantum communication and quantum network. However, the entanglement will suffer from the noise and decoherence. In this paper, we will investigate the first entanglement purification protocol for logic-qubit entanglement. We show that both the bit-flip error and phase-flip error in logic-qubit entanglement can be ...

In this paper we present an ultra low-voltage and high speed D flip-flop. The flip-flop has an increased current level compared to standard CMOS circuits operating at low supply voltages. The increased current level is obtained by using a synchronized capacitive coupling to a semi floating-gate. The delay of the static differential flip-flop presented is less than 12% compared to conventional d...