This paper presents region-based a ne motion parameter clustering methods by motion-vector and intensity matching to provide improved robustness and alignment of motion boundaries with real object boundaries. Regions may be formed as xedor variable-size rectangular blocks, triangular patches, or arbitrary-shaped areas de ned by color or texture uniformity. A particular combination of these a ne...

We prove the existence of a solution to the degenerate parabolic Cauchy problem with a possibly unbounded Radon measure as an initial data. To accomplish this, we establish a priori estimates and derive a compactness result. We also show that the result is optimal in the Euclidian setting.

I prove that the solutions of the phase-field equations, on a subsequence, converge to a weak solution of the Mullins-Sekerka problem with kinetic undercooling. The method is based on energy estimates, a monotonicity formula, and the equipartition of the energy at each time. I also show that for almost all t, the limiting interface is ( d 1)-rectifiable with a square-integrable mean-curvature v...

The Copernican principle remains largely unproven at Gpc radial scale and above. Generally, violations of this type cause a first-order anisotropic kinetic Sunyaev Zel'dovich (kSZ) effect. Here we show that, if large-scale radial inhomogeneities have amplitude large enough to explain the 'dark energy' phenomena, the induced kSZ power spectrum will be orders of magnitude larger than the Atacama ...

The theorem of Hochster and Roberts says that for any module V of a linearly reductive group G over a eld K the invariant ring KV ] G is Cohen-Macaulay. We prove the following converse: if G is a reductive group and KV ] G is Cohen-Macaulay for any module V , then G is linearly reductive.

A dynamic gate floating design is proposed to improve ESD robustness of the CMOS output buffers with small drive capability. By using this novel design, the human-body-model (machine-model) ESD failure threshold of a 2-mA CMOS output buffer has been practically improved from 1 KV (100 V) to greater than 8 KV (1500 V) in a 0.35m CMOS process.