With current low-cost high-performance workstations, application-to-application throughput is limited more by host memory bandwidth than by the cost of protocol processing. Conventional network architectures are inefficient in their use of this memory bandwidth, because data is copied several times between the application and the network. As network speeds increase further, network architecture...

With current low-cost, high performance workstations, application-to-application throughput is limited more by host memory bandwidth than by the cost of protocol processing. Conventional network architectures are inefficient in their use of this memory bandwidth, because data is copied several times between the application and the network. As networks speeds increase further, network architectu...

Quantum information theory determines the maximum rates at which information can be transmitted through physical systems described by quantum mechanics. Here we consider the communication protocol known as quantum reading. Quantum reading is a protocol for retrieving the information stored in a digital memory by using a quantum probe, e.g., shining quantum states of light to read an optical mem...

Chip Multiprocessor Systems (CMPs) rely on a cache coherency protocol to maintain memory access coherence between cached data and main memory. The Hammer coherency protocol is appealing as it eliminates most of the space overhead when compared to a directory protocol. However, it generates much more traffic, thus stressing the NoC and having worse performance in terms of power consumption. When...

Distributed database systems require a commit process to preserve the ACID property of transactions executed on a number of system sites. With the appearance of main memory database system, the database processing time has been reduced in the order of magnitude, since the database access does not incur any disk access at all. However, when it comes to distributed main memory database systems, t...

In this paper we present our design and implementation of Network-on-Chip (NoC) support into our TACO protocol processor architecture. Our signaling scheme is Virtual Component Interface standard (VCI) compliant. Due to the dataand I/O-intensive nature of protocol processing, memory access from I/O logic plays a key role in NoC interface design. We have addressed this problem by using dual-port...

Cache coherence scalability is a big challenge in shared memory systems. Traditional protocols do not scale due to the storage and traffic overhead of cache invalidation. Tardis, a recently proposed coherence protocol, removes cache invalidation using logical timestamps and achieves excellent scalability. The original Tardis protocol, however, only supports the Sequential Consistency (SC) memor...

This paper investigates the performance of shared virtual memory protocols on large-scale multicomputers. Using experiments on a 64-node Paragon, we show that the traditional Lazy Release Consistency (LRC) protocol does not scale well, because of the large number of messages it requires, the large amount of memory it consumes for protocol overhead data, and because of the diiculty of garbage co...

In multiprocessor systems with weakly consistent shared memory, memory fence (also know as barrier) instructions are necessary to establish memory consistency at synchronization points in a parallel program. Programs that follow an acquire-release synchronization protocol (e.g., Java) make frequent use of such fence instructions and hence the thrifty use and efficient implementation of such ins...

Gossip protocols are known to be highly robust in scenarios with high churn, but if the data that is being gossiped becomes corrupted, a protocol’s very robustness can make it hard to fix the problem. All participants need to be taken down, any disk-based data needs to be scrubbed, the cause of the corruption needs to be fixed, and only then can participants be restarted. If even a single parti...