The paper presents a concept of single event equivalence to be used in the sequential circuit fault simulator. The concept dynamically identifies the equivalent faults for a simulated pattern. It combines advantages of the fanout-free region, critical path tracing and the dominator concept, which were applicable only to combinational circuit fault simulation. The implemented fault simulator, SE...

A fault simulator for large synchronous sequential circuits is presented in this paper. There are four key ideas to the fault simulator. 1) It uses the critical path tracing method to screen out the single event faults that need not map into equivalent stem faults. 2) It uses the single fault propagation method to map the traced single event faults into equivalent stem faults. 3) All the multip...

In a grid environment there are thousands of resources, services and applications that need to interact in order to make possible the use of the grid [1] as an execution platform. Since these elements are extremely heterogeneous, volatile and dynamic, there are many failure possibilities, including not only independent failures of each element, but also those resulting from interactions between...

Fault simulators are used to determine which faults are detected by a test sequence. Designing fault simulators for sequential circuits is much more complicated than for combinational circuits because of the feedback and timing constraints. This report presents an overview of the sequential fault simulators and an at length analysis of two different asynchronous sequential parallel fault simula...

Overview of fault location techniques for HV (EHV) transmission lines as well as for distribution networks is presented. One-end and two-end fault location for traditional uncompensated transmission lines is considered first. The presented two-end fault location is based on unsynchronised measurements at the line terminals. Then the technique with phase co-ordinates approach is utilised for loc...

In this paper we address a very important issue in parallel rendering systems, reliability. Distributed systems, such as clusters of PCs, are low-cost alternatives for running parallel rendering systems. However, distributed systems are usually not reliable, machines can fail during the rendering process, resulting in incomplete final images. Therefore, our goal is to take advantage of specific...

Parallel processors reduce the communication overhead problem with the employment of some form of global communication network. This network however, imposes restrictions on the scaleability and technological evolution of the parallel processor. In this paper a novel architecture called PiSMA is proposed, which consists of a basic substrate, without a network, providing neighborhood connectivit...

Parallel processors reduce the communication overhead problem with the employment of some form of global communication network. This network however, imposes restrictions on the scaleability and technological evolution of the parallel processor. In this paper a novel architecture called PiSMA is proposed, which consists of a basic substrate, without a network, providing neighborhood connectivit...

A fast fault simulation approach based on ordinary logic emulation is proposed. The circuit configured into our system that emulates the faulty circuit’s behavior is synthesized from the good circuit and the given fault list in a novel way. Fault injection is made easy by shifting the content of a fault injection scan chain or by selecting the output of a parallel fault injection selector, with...