This paper presents a scheme for detecting anomalous power consumption patterns attack using wavelet transform and artificial neural network for smart grid. The main procedure of the proposed algorithm consists of following steps: I) Creating normal and anomaly patterns of power consumption to train the proposed method. II) Wavelet transform is applied on power consumption patterns to extract f...

This paper presents different techniques of one bit Full adder. In every technique the main requirements are power consumption, speed and power delay product. The proposed FIN-FET technique gives the bette.r power consumption, speed and power delay product than other techniques. The proposed Fin-FET technique is compared with some of the popular adders based on the power consumption, speed and ...

Increased power consumption is a critical concern for smartphone users. While multi-core processors in smartphones have already emerged in market, current applications are yet to take full advantage of this new architecture, particularly in the area of managing power consumption. This paper addresses the issue of managing power consumption in multicore smartphones via a middleware layer that sc...

Energy consumption constraints on computing systems are more important than ever. Maintenance costs for high performance systems are limiting the applicability of processing devices with large dissipation power. New solutions are needed to increase both the computation capability and the power efficiency. Moreover, energy efficient applications should balance performance vs. consumption. Theref...

This paper addresses power consumption in CMOS logic gates through an study considering the design and technology points-of-view. Through SPICE simulations, the relationship between charge/discharge and short-circuit components of dynamic power consumption are investigated both considering different logic gates and its evolution through technology scaling. Experimental results show that dynamic...

In this paper, we discuss on accuracy of power dissipation models for CMOS VLSI circuits. Some researchers have proposed several e cient power estimation methods for CMOS circuits [1][2][3][4]. However, we do not know how accurate they are because we have not established a method to compare the estimated results of power consumption with power consumption of actual VLSI chips. To evaluate the a...

abstract this paper presents a multiobjective power control algorithm that updates the transmitted power based on local information. the proposed algorithm is expanded by using multiobjective optimization schemes. the objectives to be optimized in this paper are determined so as to reduce the sinr fluctuations as well as maintaining the sinr to an acceptable level with minimizing an average tra...

In this study it has been tried, to compare results and convergence rate of sensitivity analysis and conjugate gradient algorithms to reduce fuel consumption and increasing engine performance by optimizing the timing of opening and closing valves in XU7/L3 engine. In this study, considering the strength and accuracy of simulation GT-POWER software in researches on the internal combustion engine...

A direct approach to transistor sizing for minimizing the power consumption of a CMOS circuit under a delay constraint is presented. In contrast to the existing assumption that the power consumption of a static CMOS circuit is proportional to the active area of the circuit, it is shown that the power consumption is a convex function of the active area. Analytical formulation for the power dissi...