Modular adder is one of the key components for the application of residue number system (RNS). Moduli set with the form of can offer excellent balance among the RNS channels for multi-channels RNS processing. In this paper, a novel algorithm and its VLSI implementation structure are proposed formodulo adder. In the proposed algorithm, parallel prefix operation and carry correction techniques ar...

This paper proposes a fast parallel Montgomery multiplication algorithm based on Residue Number Systems (RNS). It is easy to construct a fast modular exponentiation by applying the algorithm repeatedly. To realize an efficient RNS Montgomery multiplication, the main contribution of this paper is to provide a new RNS base extension algorithm. Cox-Rower Architecture described in this paper is a h...

In this paper parallel-ism on che algorithmic, architectural , and arithmetic levels is exploited in the design of a Residue Number System (RNS) based archite:;ture. The architecture is basecl on modulo processors. Each modulo processor is implemented 1 :) y two dimensional systol-ic arr,:iy composed of very simple cells. 'rhe decoding stage is im-plementled using a 2-D array, too. The dec:adin...

The class of moduli sets in the form {2 k , 2 xmlns:xlink="http://www.w3.org/1999/xlink">n -1, +1, m 4 } with ∈ xmlns:xlink="http://www.w3.org/1999/xlink">r -1} has earned significant popularity implementation Residue Number Syste...

Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and generates four complex residue numbers. In order to prevent the arithmetic overflow in the succesive...

Residue number system (RNS) is known for its parallel arithmetic and has been used in recent decades various important applications, from digital signal processing deep neural networks to cryptography high-precision computation. However, comparison, sign identification, overflow detection, division are still hard implement RNS. For such operations, most of the methods proposed literature only s...

The use of the Residue Number System (RNS) in modern telecommunication and multimedia applications is becoming more and more important because it allows interesting advantages in terms of precision, power consumption and speed. Generally, the output conversion from residue to binary is the crucial point in effective realizations of application specific architectures based on residual arithmetic...

Several Digital Signal Processing (DSP) structures based on Residue number systems (RNS) have been proposed in the technical literature. Most of them employ a look up table approach, that is highly space inefficient and slow. In this regard, we propose a memoryless high-speed error detecting FIR filter architecture using 1-out-of-n code for representing the residue numbers. With the use of 1-ou...

In this paper, an algorithm for designing efficient modulo 2n-3 multipliers is proposed. With this algorithm, we can design the fastest among all known modulo 2n-3 multipliers by applying some simple correction terms. Implemented using 90nm CMOS process technology, the proposed modulo 2n-3 multiplier can improve the current state of the art by 3.9% on the average in terms of area and 10.536.4% ...

In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up ...