This paper presents a strategy for testing future generations of wafer-level packaged logic devices that have nanoscale I/O structures. The strategy assumes that the devices incorporate built-in self test (BIST) features so that only a subset of the functional I/O needs to be directly accessed during testing. A miniature tester is described that provides test control, pattern sequencing, and cr...

Students in VLSI design courses find the opportunity to fabricate their chip designs very exciting and motivational. However, testing the chips after fabrication can be a hassle for both students and faculty. In collaboration with Sun Microsystems Laboratories, we have developed a functional chip tester that applies test vectors at low speed to check logical operation. The tester supports packa...

OBJECTIVES The diagnostic utility and reliability of an easy-to-operate novel handheld nerve conduction tester in carpal tunnel syndrome (CTS) were evaluated. MATERIALS AND METHODS Using the test device, the sensory nerve conductions (SNC) in the median and ulnar nerves were compared with each other in 194 patients with suspected CTS and 95 healthy controls. The test device results were compa...

Alon and Krivelevich (SIAM J. Discrete Math. 15(2): 211-227 (2002)) show that if a graph is ε-far from bipartite, then the subgraph induced by a random subset of Õ(1/ε) vertices is bipartite with high probability. We conjecture that the induced subgraph is Ω̃(ε)-far from bipartite with high probability. Gonen and Ron (RANDOM 2007) proved this conjecture in the case when the degrees of all vertic...

.\ hardness tester, especially adapted for grain, was cor~structecl by modifying a commercial portable soft metal tester known as the Barcol Impressor. h preloaded stylus is forced into grain sections preparetl by rneans ot a microtome. The displacement of the stylus, nleasured by a dial micrometer, is used as a hardness index. This has been related to tlie l'ickers tlianlontl pyramid hardness ...

This paper reports a comparative study between yarn mass and yarn diameter measurement systems using a differential capacitance tester and an optical coherent signal processing diameter tester respectively. A full description of the systems is presented along with their new contributions, namely 1mm length samples analysis for a capacitive tester and optical signal processing to eliminate the i...

An open architecture tester allows a third party to develop its own instrument. Such a tester must be open in the sense that it needs to be able to integrate this instrument with minimal or no impact on the overall performance and cost. It is therefore fundamental that the data flow and synchronization among all the instruments in an open architecture tester be efficient. One of these two key t...

In order to explore the failure characteristics of sandstone under unloading conditions in deep zone with high stress, constant axial pressure and confining tests were conducted on a yellow sample different initial pressures using French ROCK600-50 triaxial tester, mechanical properties, energy conversion characteristics, damage evolution law obtained. The test results showed that deformation, ...

In this paper, we provide a practical formulation of the problem of identifying all error occurrences and all failed scan cells in atspeed scan based BIST environment. We propose a method that can be used to identify every error when the circuit test frequency is higher than the tester frequency. Our approach requires very little extra hardware for diagnosis and the test application time requir...