A first study of the BTI reliability of a 6 Å EOT CMOS process for potential application in sub-threshold logic is presented. Considerable threshold voltage shifts are observed also for sub-threshold operation. The observed shifts convert to a remarkable current reduction due to the exponential dependence of current on Vth in this operating regime. Moreover, the pMOS is observed to degrade sign...

We discuss how threshold mechanisms can be effectively employed to control chaotic systems onto stable fixed points and limit cycles of widely varying periodicities. Then, we outline the theory and experimental realization of fundamental logic-gates from a chaotic system, using thresholding to effect control. A key feature of this implementation is that a single chaotic 'processor' can be flexi...

The basic processing unit of a neural network i s a linear threshold element. I t has been known that neural networks can be much more powerful than traditional logic circuits, assuming that each threshold element can be built at a cost comparable to that o f AND, OR, Nor logic elements. Whereas any logic circuit o f polynomial size (in n) that computes the product of two n-bit numbers requires...

Cognitive radio communication has emerged as an efficient mean of utilization of spectrum for wireless communication. In cognitive radio communication the energy detector logic for spectrum estimation is the most eminent part for estimation of used spectrum over unused spectrum. The estimation error rate for such a system is dependent on the probability based hypothetical estimation approach. W...

In this paper we discuss the potential of emerging spintorque devices for computing applications. Recent proposals for spinbased computing schemes may be differentiated as ‘all-spin’ vs. hybrid, programmable vs. fixed, and, Boolean vs. non-Boolean. Allspin logic-styles may offer high area-density due to small form-factor of nano-magnetic devices. However, circuit and system-level design techniq...

– Four different dynamic circuit techniques are proposed in this paper for lowering the active mode power consumption, increasing the speed, enhancing the noise immunity, and reducing the subthreshold leakage energy of domino logic circuits. A variable threshold voltage keeper circuit technique is proposed for simultaneous power reduction and speed enhancement of domino logic circuits. The thre...

The main result of this paper is the development of a low depth carry lookahead addition technique based on threshold logic. The adders designed using this method are shown to have a very low logic depth and therefore reduced area and improved speed over conventional logic implementations.

We analyze the notion of “local names” in SPKI/SDSI. By interpreting local names as distributed groups, we develop a simple logic program for SPKI/SDSI’s linked localname scheme and prove that it is equivalent to the nameresolution procedure in SDSI 1.1 and the 4-tuple-reduction mechanism in SPKI/SDSI 2.0. This logic program is itself a logic for understanding SDSI’s linked local-name scheme an...

Investigation of computing devices with dynamic architecture which makes devices have reconfigurable ability is an interesting research direction for designing the next generation of computer chip. In this paper, we present a window threshold method to construct such dynamic logic architecture. Here, dynamic multiple-input multiple-output MIMO logic gates are proposed, analyzed, and implemented...