A frequency compensation technique for the improvement of unity gain bandwidth (UGB) and power supply rejection ratio (PSRR) of two stage operational amplifiers is presented in this paper. Performance of proposed op-amp is compared with classical miller compensated op-amp and op-amp proposed by G. Blakiewicz [13]. The technique exploits the triode mode operation of a MOSFET in the compensation ...

A design strategy for a rail-to-rail input / output operational amplifier in standard CMOS 0.18 μm digital process with a 0.5-V threshold is presented. It uses a novel level shifting technique of the input signal and a dynamically biased class AB output stage based on a switched-capacitor configuration. The amplifier is capable of working with a power supply as low as 1-V while providing a 26.6...

This paper addresses the difficulty of designing 1-V capable analog circuits in standard digital complementary metal–oxide–semiconductor (CMOS) technology. Design techniques for facilitating 1-V operation are discussed and 1-V analog building block circuits are presented. Most of these circuits use the bulk-driving technique to circumvent the metal– oxide–semiconductor field-effect transistor t...

Two new class AB output stages for CMOS op-amps are proposed with accurate quiescent current control. The second proposed stage also provides accurate control of the minimum current through the output transistors. The proposed stages can be operated with a supply voltage close to a transistor threshold voltage. A dynamic biasing scheme allows them to operate in a wide range of supply voltages. ...

We show that anomalous dispersion characteristic of fast-light can be used to enhance the sensitivity of optical interferometry under certain conditions. In particular, we show that a dual-chamber Fabry-Perot interferometer with a shared mirror-pair can be used in a way so that its sensitivity is increased by operating near the critically anomalous dispersion condition where the group index is ...

A menu-driven graphics-based simulation package called DESIGN has been developed. It enables the users to add/delete poles or zeros and vary design requirements such as the value of the gain, damping factor, overshoot, delay time, rise time, bandwidth, resonance frequency, etc., to see the effects on system response. The package is designed around the root locus plot of a unity feedback control...

This paper presents review on system level design of continuous time sigma delta modulator. A continuous time approach offers high accuracy with respect to discrete time modulator. Unity gain frequency and power can be achieved by continuous time design. as the sigma delta modulators are mainly implemented as discrete time circuits , a continuous time approach provides significant advantages fo...

This paper presents a model for the frequency response of 65 nm RF power CMOS devices as a function of device width. We find that the cut-off frequency (fT) and maximum oscillation frequency (fmax) decrease with increasing device width. Small-signal equivalent circuit extractions reveal that the main reason for the degradation in fT and fmax is the presence of non-scalable parasitic resistances...

This work proposes a novel geometry field effect transistor with graphene as a channel-graphene field-effect transistor (GFET), having a hybrid contact that consists of an ohmic source/drain and its extended part towards the gate, which is capacitively coupled to the channel. The ohmic contacts are used for direct current (DC) biasing, whereas their capacitive extension reduces access region le...