ABSTRACT:The main objectives of any VLSI design are to achieve the low Power, minimum Delay and Area reduction. Minimizing power, delay & area is a challenge in the present situation, but all efforts to achieve one of these can lead to a better design. This paper proposes an EDA tool for low power/ high speed VLSI design, which solves any DFG to estimate the speed of operation and the percentag...

The task of producing a VLSI architecture that will solve a given problem contains many design decisions. The eeects of these decisions on the nal design are often diicult to quantify. We will compare three diierent implementations of a systolic architecture for solving the knapsack problem using the dynamic programming method. The design decisions involved and the \engineering" of the algorith...

VLSI design is probably the most fascinating application area of combinatorial optimization. Virtually all classical combinatorial optimization problems, and many new ones, occur naturally as subtasks. Due to the rapid technological development and major theoretical advances the mathematics of VLSI design has changed significantly over the last ten to twenty years. This survey paper gives an up...

It is widely agreed that the design methods and computer support of VLSI design are generally more mature than those of mechanical items. Why is this so, and is there any hope of the gap being significantly closed? This paper argues that there are fundamental reasons, that is, reasons based on natural phenomena, that keep mechanical design from approaching the ideal of VLSI design methods. The ...

An asynchronous circuit, or self-timed circuit, is a sequential digital logic circuit which is not enabled by a global clock signal. Instead of that, they often use signals that indicate completion of operations and instructions, specified by handshaking or simple data transfer protocols. This type is contrasted with a synchronous logic circuit where changes to the output signal values are trig...

Emerging “systems-on-a-chip ” will require a design environment that allows distributed access to libraries, models and design tools. In this paper we present a framework using the ObjectWeb technologies to implement Web-based CAD. The framework includes the infrastructure to store and manipulate design objects, protocols for tool communication and WebTop, a Java hierarchical schematic/block ed...

A genetic algorithm for the physical design of VLSI chips is presented The algorithm simultane ously optimizes the placement of the cells with the total routing During the placement the detailed routing is done while the global routes are opti mized by the genetic algorithm This is just opposed to the usual serial ap proach where the computation of the detailed routing is the last step in the l...