A novel fuzzy-based activation function for artificial neural networks is proposed. This approach provides easy hardware implementation and straightforward interpretability in the basis of IF-THEN rules. Backpropagation learning with the new activation function also has low computational complexity. Several application examples ( XOR gate, chaotic time-series prediction, channel equalization, a...

In this paper we present a method for symbolic analysis of unreliable logic circuits in the presence of correlated and data-dependent gate failures, described by Markov chains. Furthermore, using this method we investigate the influence of data-dependent failures on the performance of majority logic and multiple input XOR gates.

We show that a set of gates that consists of all one-bit quantum gates (U(2)) and the two-bit exclusive-or gate (that maps Boolean values (x; y) to (x; xy)) is universal in the sense that all unitary operations on arbitrarily many bits n (U(2 n)) can be expressed as compositions of these gates. We investigate the number of the above gates required to implement other gates, such as generalized D...

Random number generator designs are discussed, which utilize oscillatory metastability, induced by switching between two stable states of ring‐connected digital gates. For a short time after the switch‐over the circuits behave quite randomly, influenced by the circuit noise. We provide simple programs, which simulate the fundamental behavior of our circuits. We also present a ma...

In this letter a new technique is introduced for implementing the basic logic functions using analog current‐mode techniques. By expanding the logic functions in power series expressions, and using summers and multipliers, realization of the basic logic functions is simplified. Since no transistors are working in saturation, the problem of fan‐out is alleviated. To illustrate the proposed techn...

In this paper, by employing the logical effort technique an efficient and high-speed VLSI implementation of the digit-serial Gaussian normal basis multiplier is presented. It is constructed by using AND, XOR and XOR tree components. To have a low-cost implementation with low number of transistors, the block of AND gates are implemented by using NAND gates based on the property of the XOR gates ...

There is a close connection between Direct Product and XOR lemmas in the sense that in many settings, we can prove one given the other. The known reductions that are used for the above purpose are either in the non-uniform setting or give non-matching parameters. By non-matching parameter we mean that k-wise Direct Product lemma implies k′-wise XOR lemma (and vice versa) for k 6= k′. In this wo...

In present work, improved designs for voltage controlled ring oscillators (VCO) using three transistors XNOR/XOR gates have been presented. Supply voltage has been varied from [1.8 1.2] V in proposed designs. In first method, the VCO design using three XNOR delay cells shows frequency variation of [1.900 0.964] GHz with [279.429 16.515] μW power consumption variation. VCO designed with five XNO...

A novel CMOS 4-2 compressor using pass logic is presented in this paper. An XOR-XNOR combination gate is used to build the circuit while totally eliminating the use of inverters. The total power dissipation has been cut down to a minimum while providing the full output voltage swing at all nodes in the circuit. Furthermore, the complete circuit is implemented with a bare minimum of 28 transistors.