This paper describes the design of a CMOS frequency synthesizer targeting wireless local area network applications in the 5-GHz range, with emphasis on the HIPERLAN standard. Based on an integer-N architecture, the synthesizer produces a 5.2-GHz output as well as the quadrature phases of a 2.6-GHz carrier. Fabricated in a 0.4m digital CMOS technology, the circuit provides a channel spacing of 2...

We observed the thirteen extragalactic radio sources of the complete S5 polar cap sample at 15. We present the maps from those two epochs, along with maps obtained from observations of the 2 cm VLBA survey for some of the sources of the sample, making a total of 40 maps. We discuss the apparent morphological changes displayed by the radio sources between the observing epochs. Our VLBA observati...

A wideband amplifier up to 50 GHz has been implemented in a 0.25 μm, 200 GHz f t SiGe BiCMOS technology. Die size was 0.7×0.73 mm. The two-stage design achieves more than 11 dB gain over the whole 20 to 50 GHz band. Gain maximum was 14.2 dB at 47.5 GHz. Noise figure was lower than 9 dB up to 34 GHz and a current of 30 mA was drawn from a 4 V supply. To the author’s best knowledge this is the hi...

A novel multiband multiple-input-multiple-output (MIMO) antenna system is proposed. The MIMO antenna system consists of two antenna elements, each of which comprises of three radiators: a driven monopole, an S-shaped strip and an inverted F-shaped strip and occupies footprint of 15x18.5x0.8 mm3 only. The driven monopole acts as a quarter-wave monopole and stimulate higher mode resonance. The tw...

In this study an ultra-broad band, low-power, and high-gain CMOS Distributed Amplifier (CMOS-DA) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. It is created bycascading of inductively coupled common-source (CS) stage and Regulated Cascode Configuration (RGC).The proposed three-stage DA is simulated in 0.13 μm CMOS process. It achieves flat and high ...