A two-channel time-interleaved second-order sigma-delta modulator for broadband applications including asymmetrical digital subscriber line (ADSL) is presented. The proposed two-channel modulator uses a single integrator channel which does not require additional active elements for the quantizer input generation, since the integrator outputs are directly used as the input of the quantizers. As ...

Digital delta-sigma modulators (DDSMs) applied in fractional-N frequency synthesizers suffer from spurious tones which undermine the synthesizer’s spectral purity. We propose a solution featuring no hardware overhead while achieving equivalent spur elimination effect as using LFSR-dithering. This method can be implemented on MASH and single-loop DDSMs of 3rdand 2nd-order. key words: Digital del...

This paper presents a mixed equation-based and simulation-based design methodology for continuous-time Sigma-Delta modulators from high level specifications down to Layout. The calculation and scaling of the SigmaDelta coefficients as well as circuit sizing and layout generation are implemented in the same analog design environment CAIRO+. The design of a complete third order current-mode conti...

Sigma-delta modulators use a noise-shaping technique to curtail the noise power in band of interest during digital-to-analog conversion. Error feedback modulator employs an efficient transfer function for time varying inputs than any other sigma-delta modulators. However, efficiency conventional degrades and quantizer saturation issue provokes when input signal reaches full scale. This work pro...

This paper presents a reconfigurable sigma-delta audio Digital-to-Analog Converter (DAC) which is suitable for embedded FPGA applications. The Sigma-Delta Modulator (SDM) design can be configured as a 3rd or 5th order SDM and allows different input word lengths. Different input sampling rates are also entertained by employing a programmable interpolator. The DAC accepts 16-/18-/20-/24-bit PCM d...

In this paper the spectral density of the additive jitter noise in continuous time (CT) Delta-Sigma modulators (DSM) is derived analytically. Making use of the analytic results, extracted in this paper, a novel method for elimination of the damaging effects of the clock jitter in continuous time Delta-Sigma modulators is proposed. In this method instead of the conventional waveforms used in the...

Abstract: Switched Current (SI) is a very interesting analog technique to perform interface circuits in mixed analog/digital systems because it is compatible with a low cost digital CMOS process (single poly technologies). The attempt of this work is to shed some light on the SI delta-sigma converter design method making use of an analog Hardware Description Language. To demonstrate the perform...

Resolution of a multibit delta-sigma modulator (DSM) is limited by its internal digital-to-analog converter (DAC) nonlinearity that is usually caused by circuit mismatch errors while realizing. Recently, some dynamic element matching (DEM) methods were proposed for reducing mismatch errors. Two main difficulties of different dynamic element matching (DEM) techniques relate to instability and co...

Micromachined inertial sensors are often incorporated in closed loop force feedback structures; a particularly advantageous approach is based upon the inclusion of the sensing element in a sigma-delta modulator (Σ∆M) type control structure. The order of the Σ∆M, and hence the noise shaping properties, is usually limited by the dynamics of the mechanical sensing element and may be insufficient f...

Sigma delta modulators have been in widespread use for some time now. The relaxed analog component requirements of a sigma delta modulator (achieved through low bit counts and oversampling) make it a simple and elegant solution to the problem of analog to digital conversion. The disadvantage of conventional sigma delta modulators is that the sample rate must be many times higher than the highes...