The real-time hardware application is developed around a FPGA hardware architecture that includes embedded processor MicroBlaze on the field programmable gate array (FPGA).This paper introduces a design of a Micro Blaze soft-core processor system that can be running the output pins (XGI Expansion Headers Protocol) as such as clock generator to feed external circuits. The designed processor syst...

In the MPEG-1 multimedia standard, no encoding scheme is defined, but a generally accepted scheme includes the following building blocks: discrete cosine transform, quantization, zig-zag scanning, run-level coding, variable-length encoding, and motion estimation. In this paper, we describe the investigation into how such building blocks can be implemented in reconfigurable hardware, more specif...

The current ultrasound therapy machines are implementing continuous waveform, which in fact, is not an optimum technique for therapy treatment process. Apparently, pulse waveform appearing as a more effectively way of signal generation in terms of its power consumption, low cost hardware and short timing used. In order to overcome these drawbacks of conventional therapy machines, we proposed a ...

This paper proposes the implementation of a Elliptic Curve (EC) cryptosystem which is aimed to provide secure stream ciphers, hash functions and key exchange in a time shared manner. The design of hardware efficient stream cipher based on elliptic curves proposes the use of point multiplication block on a time sharing basis for providing secure stream ciphers, hash generation and key exchange. ...

In this paper, a video surveillance-based image processing system is developed on Xilinx Spartan3 Field Programmable Gate Array (FPGA) device using embedded development kit (EDK) tools from Xilinx. Two different hardware architectures of two dimensional (2-D) video surveillance have been implemented as a coprocessor in an embedded system. It is direct implementation of video surveillance by Mot...

The complex equation of sigmoid function is one of the most difficult problems encountered for implementing the artificial neural network (ANN) into a field programmable gate array (FPGA). To overcome this problem, the combination of second order nonlinear function (SONF) and the differential lookup table (dLUT) has been proposed in this paper. By using this two-steps approach, the output accur...

In this paper, we present a fast pairwise statistical significance estimator using a Field Programmable Gate Array (FPGA) coprocessor. The running time of the pairwise statistical significance estimation routine is dominated by the hundreds of local alignments it must compute. By offloading the alignment task to an accelerator designed to concurrently process multiple independent alignments, we...

Several techniques are available for implementing DC-DC converters using digital controllers Among these FPGA (Field Programmable Gate Array) based implementation provides various advantages in terms of speed, flexibility, low power usage, reduced equipment sizing and massive parallelism. The traditional methods allow fault diagnosis only after the final implementation which leads to extra cost...

In this paper, a new controllable V-shape multiscroll attractor is presented, where a variety of symmetrical and unsymmetrical attractors with a variable number of scrolls can be controlled using new staircase nonlinear function and the parameters of the system. This attractor can be used to generate random signals with a variety of symbol distribution. Digital implementation of the proposed ge...

This paper describes the implementation of fuzzy control algorithm (state controller with adjustable gains by fuzzy sets) in DC-DC Buck converter. All tasks are implemented by FPGA. Fuzzy sets are tuned by genetic algorithm of-line by using Fuzzy-logic and genetic toolbox in MATLAB. Fuzzyfication and defuzzyfication algorithms are implemented in real time in Field Programmable Gate Array (FPGA)...