The three-input TOFFOLI gate is the workhorse of circuit synthesis for classical logic operations on quantum data, e.g., reversible arithmetic circuits. In physical implementations, however, TOFFOLI gates are decomposed into six CNOT gates and several one-qubit gates. Though this decomposition has been known for at least 10 years, we provide here the first demonstration of its CNOT-optimality. ...

XOR & AND gates are most important basic building blocks of any VLSI applications. These gates can be implemented in different architectures by using different circuit designs techniques. This paper evaluates and compares the performance of various design techniques of XOR-AND gates. The performances of these techniques have been evaluated by Tanner Tools V13 using the 90nm CMOS technology. In ...

We analyze a quantum network, constructed with ballistic electron waveguides, which can add one-bit binary numbers. We consider two different adder networks, one constructed with Hadamard gates and the other constructed with ÎNOT gates. Reflection of electron probability at the gates causes a loss in fidelity of the overall calculation. A fidelity requirement for the implementation of individua...

In this paper, logical masking capability of commonly used logic gates such as NOT, AND/NAND, OR/NOR, and XOR/XNOR, when subject to single/multiple input faults, are analyzed from a mathematical perspective. A new metric, called Gate Error Metric (GEM) is proposed to study the extent of output error in these gates when subject to potential input fault occurrences, where less value of GEM implie...

In this paper we investigate single electron tunneling (SET) devices from the logic design perspective, using the SET tunnel junction’s ability to control the transport of individual electrons. More in particular, we investigate the behavior of a family of single electron encoded logic (SEEL) gates, consisting of a 2-input AND gate, a 2-input OR gate and a NOT gate, and simulate the gates. A ch...

For classical circuits, both {AND, NOT} and the single-gate set {NAND} are universal. To nd universal sets of quantum gates, we use the quantum circuit model, in which each gate is represented by a 2 by 2 unitary matrix. Composition of gates is done by multiplying these matrices. The space of operations generated by a set of gates is a subgroup of the unitary group U (2) (or SU (2), ignoring gl...

The well-known classical constructions of garbled circuits use four ciphertexts per gate, although various methods have been proposed to reduce this cost. The best previously known methods for optimizing AND gates (two ciphertexts; Pinkas et al., ASIACRYPT 2009) and XOR gates (zero ciphertexts; Kolesnikov & Schneider, ICALP 2008) were incompatible, so most implementations used the best known me...

We describe a method for achieving arbitrary 1-qubit gates and controlled-NOT gates within the context of the Single Cooper Pair Box (SCB) approach to quantum computing. Such gates are sufficient to support universal quantum computation. Quantum gate operations are achieved by applying sequences of voltages and magnetic fluxes to single qubits or pairs of qubits. Neither the temporal duration, ...

A thorough investigation has been made to obtain SQUID device parameters and properties, and the optimization of the latter for the application of logics gates. SQUID OR, AND gates have been designed theoretically using the optimized techniques. Our concept of turn-on delay has been applied for critically ascertaining the switching speed of these logic gates. The dynamic response of the logics ...

Transversal operations in quantum error correction, that is logical gates that are executed by applying a set of gates in parallel, are the most straightforward form of fault-tolerant quantum logic. Naturally, characterizing the set of logical gates that can be implemented transversally for a class of codes is of great importance to fault-tolerant quantum architectures. In this work, we classif...