We present an optical shift register that consist out of two serially connected optical flip-flop memories driven by common clock pulses. Each optical flip-flop consists out of two ring lasers sharing a single active element, which makes the optical flip-flops easily cascade with each other. The two cascaded optical flip-flops are controlled by the clock pulses in such a way that the input data...

Apoptosis-related genes play important roles in thymocyte maturation. We show that cellular FLICE-like inhibitory protein (c-FLIP), a procaspase-8-like apoptotic regulator, plays an essential role in the efficient development of mature T lymphocytes. Mice conditionally lacking c-FLIP in T lymphocytes display severe defects in the development of mature T cells, as indicated by a dramatically red...

Adaptor protein FADD forms the death inducing signaling complex (DISC) by recruiting the initiating caspases-8 and -10 through homotypic death effector domain (DED) interactions. Cellular FLICE-inhibitory protein (c-FLIP) is an inhibitor of death ligand-induced apoptosis downstream of death receptors, and FADD competes with procaspase-8/10 for recruitment for DISC. However, the mechanism of act...

Understanding the signals that regulate eosinophil survival and death is critical to developing new treatments for asthma, atopy, and gastrointestinal disease. Previous studies suggest that TNF-α stimulation protects eosinophils from apoptosis, and this TNF-α-mediated protection is mediated by the upregulation of an unknown protein by NF-κB. Here, we show for the first time that eosinophils exp...

Power dissipation of IC during test mode is greater than the IC’s normal mode of functioning. Power consumption in scan based testing is high due to the toggling of the combinational logic during the scan shift.In digital systems power reduction is the most critical issue. A FLIP FLOP is a one bit storage device used for storage device used for storage purpose. Mostly used d-flip flop in digita...

In this paper, a novel low power pulsed flip-flop (PFF) using self-controllable pass transistor logic is presented. The pulse generation logic comprising of two transistor AND gate is used in the critical path of the design for improved speed and reduced complexity. In the D to Q path inverter is removed and the transistor is replaced with pass transistor logic. The pass transistor is driven by...

BACKGROUND The expression of c-FLIP (cellular Fas-associated death domain-like interleukin-1 beta-converting enzyme (FLICE)-inhibitory protein), which is a member of the family of inhibitors of apoptosis, has been associated with tumor development and progression. The aim of this study was to evaluate the expression of c-FLIP in gastric cancer and its correlation with tumor cell proliferation, ...

We prove a general form of bit flip formula for the quantum Fourier transform on finite abelian groups and use it to encode some general CSS codes on these groups.

The digital hardware implementation of various fuzzy operations furthermore of fuzzy flip-flops has been the subject of intense study and application. The fuzzy D flip-flop derived from fuzzy J-K one is a single input single output unit with sigmoid transfer characteristics in some particular cases, proper to use as neuron in a Fuzzy Neural Networks (FNN). In this paper we propose the hardware ...

In this paper, a high-speed double-edge-triggered flip-flop designed in 0.18μm CMOS technology is presented. Flip-flops, to a large extend, determine the speed of synchronous systems. The proposed flip-flop can operate with a clock rate as high as 12.5GHz, which translates to 25GB/s data rate. It samples the data on both edges of the clock. All signals are realized differentially. The different...