This work presents the design of an inductively source degenerated CMOS differential common source cascode Low Noise Amplifier (LNA) operating at 2 GHz frequency. An inductor is added at the drain of the main transistor to reduce the noise contribution of the cascode transistors. Another inductor connected at the gate of the cascode transistor and capacitive cross-coupling are strategically com...

A low-noise amplifier (LNA) uses low-loss monolithic transformer feedback to neutralize the gate–drain overlap capacitance of a field-effect transistor (FET). A differential implementation in 0.18m CMOS technology, designed for 5-GHz wireless local-area networks (LANs), achieves a measured power gain of 14.2 dB, noise figure (NF, 50 ) of 0.9 dB, and third-order input intercept point (IIP3) of+0...

This paper discusses the design, analysis and performance of a 2.4 GHz fully integrated low-power current-reused receiver front-end implemented in 0.18 μm CMOS technology. The front-end is composed of a single-to-differential low-noise amplifier (LNA), using high-Q differential transformers and inductors and a coupled switching mixer stage. The mixer transconductor and LNA share the same DC cur...

Wireless medical body-area networks are used to connect sensor nodes that monitor vital parameters. The radio consumes a large portion of the sensor energy budget, and hence its power dissipation should be minimized. The low-noise amplifier (LNA) is an important component of the receiver, and must guarantee low-noise amplification and impedance matching. In this work, an ultra-low-voltage ultra...

This paper presents the design and analysis of a dual-band low noise amplifier (LNA) at 2.4 GHz and 5.75 GHz for IEEE 802.11 a/b/g applications. This LNA proposed current-reused topology and presented new Hi-Pass and Lo-Pass matching technique network at the two stage common-source transistor. The LNA used GaAs HEMT transistor to improve the gain and noise figure (NF) matched concurrently at th...

In this paper, an active integrated antenna (AIA) system is proposed for mobile and wireless communication devices. The AIA system consists of a microstrip patch antenna and a low noise amplifier (LNA), which are integrated together with a matching circuit and printed on an FR4 PCB circuit board. The system is designed, analyzed, and optimized by targeting to satisfy the design specifications f...

Low Noise Amplifier and Mixer design considerations for 2.45 GHz Bluetooth applications have been studied. A detailed noise analysis is presented. A design strategy for an inductively degenerated common-source LNA with cascode transistor and current-commutating Mixer is proposed, considering the tradeoffs between noise, linearity, power consumption and matching of impedances. Additionally, this...

Abstract: In the paper, the folded-cascode low-noise operational amplifier (LNA) with constant-gm is proposed and analyzed. The channel-length split technique adopted to expand ratio of W/L of the differential pair transistor to improve the performance of LNA for the gain bandwidth product, noise and offset voltage. The channel-length split method is separated differential input transistor into...

This paper reviews and analyzes four reported low noise amplifier (LNA) design techniques applied to the cascode topology based on CMOS technology: classical noise matching (CNM), simultaneous noise and input matching (SNIM), powerconstrained noise optimization (PCNO), and power-constrained simultaneous noise and input matching (PCSNIM) techniques. Very simple and insightful sets of noise param...

This paper describes a Low-Noise Amplifier (LNA), designed using a 0.25-μm SiGe process, operating in the 4.4– 5 GHz band. A power gain of 12.8 dB at 5 GHz has been achieved with a power consumption of 23.77 mW using a 2 V power supply. The noise figure is 2.2 dB while the input referred 1dB compression point is −6.2 dBm.