Parallel incremental scheduling is a new approach for load balancing. In parallel scheduling,all processorscooperatetogether to balance the workload. Parallel scheduling accuratelybalances the load by using global load information. In incremental scheduling, the system scheduling activity alternates with the underlying computation work. This paper provides an overview of parallel incremental sc...

The mammalian visual system processes many different aspects of the visual scene in separate, parallel channels. Recent experiments suggest that the visual cortex, like the retina, forms parallel circuits even at very fine spatial scales.

ly, we consider an in-memory interface to cleanly separate the networking from the disk activity. This is equivalent to assuming that the server’s networking activity can be explicitly scheduled, in a manner that is independent from other server activity. Our results will apply to systems in which this is the case. We anticipate that in large-scale servers, independent network scheduling will b...

High-performance computers are increasingly in demand in the areas of structural analysis, weather forecasting, petroleum exploration, medical diagnosis, aerodynamics simulation, artificial intelligence, expert systems, genetic engineering, signal and image processing, among many other scientific and engineering applications. Without superpower computers, many of these challenges to advance hum...

The performance of microprocessors has increased steadily over the past 20 years at a rate of about 50% per year. This is the cumulative result of architectural improvements as well as increases in circuit speed. Moreover, this improvement has been obtained in a transparent fashion, that is, without requiring programmers to rethink their algorithms and programs, thereby enabling the tremendous ...

| Increasing demands for performance (in the sense of processing power) in scientiic applications lead to a seemingly never ending quest for \peak performance". A variety of architectural concepts supporting parallel processing have been proposed and several commercial machines are (more or less successful) on the market. While the theoretical peak performance reported by hardware vendors has s...

This paper describes PPRAM (Parallel Processing Random Access Memory) that is an architectural framework for merged memory/logic ASSPs(Application-Speci c Standard Products). At rst, the paper discusses the serious problems that the current high-performance microprocessor-based systems are facing: memory wall, design-cost/time problem, and limits of instruction-level parallelism, and how PPRAM ...

In this paper, PArallel Resolution Algorithm (PARA) is described to improve the execution efficiency in resolution process. PARA consists of two parts: parallel unification and generation of a resolvent. The first part is characteristic of PARA, which partitions whole set of expressions W into independent clusters as pre-processing and unifies each cluster in parallel. The efficient implementat...