A cascode CMOS low noise amplifier (LNA) is presented along with the used design methodology and measurement results. The LNA works at 2.4 GHz with 14.5 dB voltage gain and 2.8 dB simulated noise figure (NF). Powered from a 1.8 V supply, the core measured current consumption is 2.76 mA. An output buffer was designed to match a 50 Ω load and its current consumption is 5.5 mA. The technology used...

By Aalay Kapadia in Electrical Engineering and Electronic Engineering. The circuit topology we used for this project is a cascode LNA with inductive source. Typical parameters are maximum transducer gain, output power , low noise, circuit stability. Here a LNA is designed to obtain an optimum gain with minimum.

With the increase in renewable energy generation, microgrid has put forward higher requirements on power density and performance of photovoltaic inverter. In this paper, dynamic process inverter based cascode Gallium nitride (GaN) high electron mobility transistor (HEMT) for (PV) application is analyzed detail. The parasitic inductors capacitors have been considered our proposed equivalent mode...

We present an area-efficient and low-power four-channel 25-Gb/s trans-impedance amplifier for Rx analog front-end (Rx-AFE) on optical receiver. The proposed circuit features a local negative-feedback (TIA) to expand the bandwidth. TIA post-amplifier use regulated cascode (RGC) topology two differential stages with inductive peaking bandwidth extension technique acquire 19.6 GHz of -3 dB 53.3 dB...

The problems resulting from the use of nano-MOSFETs in design operational trans-conductance amplifiers (OTAs) lead to an urgent need for new techniques produce high-performance metrics OTAs suitable very high-frequency applications. In this paper, enhancement and equations proposed single-stage folded-cascode (FCOTA) are presented its various performance metrics. FCOTA adopts (FC) current sourc...

This thesis describes the circuit level design of a 900MHz EA ring oscillator based phase-locked loop using 0.35um technology. Multiple phase noise theories are considered giving insight into low phase-noise voltage controlled oscillator design. The circuit utilizes a fully symmetric differential voltage controlled oscillator with cascode current starved inverters to reduces current noise. A co...

In this paper, we present a new composite transistor circuit design technique that provides superior performance enhancement to analog circuits. By adding a composite transistor to the cascode-compensated amplifier, it has achieved a 102 dB DC gain, and a 37.6 MHz unity gain bandwidth while driving a 2 nF heavy capacitive load at a single 1.8 V supply. In the comparison of power-bandwidth and p...

In this study an ultra-broad band, low-power, and high-gain CMOS Distributed Amplifier (CMOS-DA) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. It is created bycascading of inductively coupled common-source (CS) stage and Regulated Cascode Configuration (RGC).The proposed three-stage DA is simulated in 0.13 μm CMOS process. It achieves flat and high ...