Please cite this article in press as: Hwang E et a logic applications. Solid State Electron (2011), d In this paper, the scalability of In0.7Ga0.3As QWFET is investigated using two-dimensional numerical drift–diffusion simulation. Numerical drift–diffusion simulations were calibrated using experimental results on short-channel In0.7Ga0.3As QWFETs [7] to include the effects of velocity overshoot...

This paper presents the design of high performance and ultralow power 8-bit carry-look-ahead adder circuits using two-phase modified dual-threshold voltage (dual-VT) domino logic method with the feed through logic concept. The proposed concepts are provides lower delay and dynamic power consumption; due to these two advantages it perform better in high fan-out and high switching frequencies. Th...

Dynamic logic circuits are used for high performance and high speed applications. Wide OR gates are used in Dynamic RAMs, Static RAMs, high speed processors and other high speed circuits. In spite of their high performance, dynamic logic circuit has high noise and extensive leakage which has caused problems for the circuits. To overcome these problems Domino logic circuits are used which reduce...

Level shifters play critical roles in ultra low-voltage circuits and systems. a new low power level shifter (LS) is presented for robust logic voltage shifting from near/sub threshold to above threshold domain. The new circuit combines the multi threshold CMOS technique along with novel topological modifications to guarantee a wide voltage conversion range with limited static power and total en...

The approach is based on a design of threshold logic gates (TLGs) and their seamless integration with conventional standard-cell design flow. We first describe a new robust, standard-cell library of configurable circuits for implementing threshold functions. Abstractly, the threshold gate behaves as a multi-input, single output, edge-triggered flip-flop, which computes a threshold function of t...

Sub-threshold is a new paradigm in the digital VLSI design today. In Sub-threshold region, transistors are operated in sub-threshold voltage. This paper examine the Carry Look Ahead (CLA) Adder with dual mode logic (DML)principle, in which gates are operated in sub-threshold regime and comparison of results with Conventional basic Carry look ahead adder . The number of gates in CLA is 5 includi...