In this paper, we describe the CASIA statistical machine translation (SMT) system for the IWSLT2013 Evaluation Campaign. We participated in the Chinese-English and English-Chinese translation tasks. For both of these tasks, we used a hierarchical phrase-based (HPB) decoder and made it as our baseline translation system. A number of techniques were proposed to deal with these translation tasks, ...

Multicore computer architectures are now the standard for desktop computers, high-end servers and personal laptops. Due to the multicore shift in computer architecture, software engineers must write multithreaded programs to harness the resources of these parallel machines. Unfortunately, today’s parallel programming techniques are difficult to reason about, highly error-prone and challenging t...

Transactional memory (TM) is a promising approach for designing concurrent data structures, and it is essential to develop better understanding of the formal properties that can be achieved by TM implementations. Two fundamental properties of TM implementations are disjoint-access parallelism, which is critical for their scalability, and the invisibility of read operations, which reduces memory...

This paper presents NeuTM, a framework for network Traffic Matrix (TM) prediction based on Long Short-Term Memory Recurrent Neural Networks (LSTM RNNs). TM prediction is defined as the problem of estimating future network traffic matrix from the previous and achieved network traffic data. It is widely used in network planning, resource management and network security. Long Short-Term Memory (LS...

Transactional memory (TM) was invented 15 years ago [1]. Recently, however, TM activity has exploded [2], as the proliferation of multicore chips has provoked researchers to revisit support for parallel programming. Since some regard me as a TM expert, most of my talk will summarize TM’s goals and implementation options, primarily by developing a taxonomy and using Wisconsin LogTM [3, 4] as a c...

Transactional memory (TM), a recent parallel programming concept, aims to simplify parallel programming while simultaneously maintaining performance benefits found in concurrent applications. Consistency checking, the manner in which memory conflicts are identified in transactional memory, is a critical aspect to TM system performance. We present a theoretical, analytical and empirical view of ...

Transactional memory (TM) algorithms are subtle and the TM correctness conditions are intricate. Decomposition of the correctness condition can bring modularity to TM algorithm design and verification. We present a decomposition of opacity called markability as a conjunction of separate intuitive invariants. We prove the equivalence of opacity and markability. The proofs of markability of TM al...