Pulse computation is a hybrid of conventional analog and digital techniques which encodes and processes information in the time domain. In this paper we present a new technique for pulse computation with simple pulse-driven, asynchronous nite state machines. Asynchronous FSMs are robust and timescale-independent, and can be used as building blocks for constructing complex pulse processors. The ...

We propose and analyze analog VLSI implementations of neural networks in which both the neural cells and the synapses are realized using Operational Transconductance Amplifiers (OTAs). These circuits have inherent advantages of immunity to noise, very high input/output impedances, differential architecture with automatic inversion, and density. An efficient on-chip technique for weight adaptati...

In this paper, we report the achieved performance of devices and integrated circuits (ICs) using a manufacturable InP DHBT-based technology. High speed MBE grown InGaAs/InP DHBTs with an effective emitter junction area of 4.8 μm exhibited peak fT and fMAX values of 265 and 305 GHz, respectively, at a collector current density of 3.75 mA/μm. Using this technology, a set of basic analog and digit...

This paper, split into Parts I and II, reviews recent innovations in circuit design that have accelerated the miniaturization of sensor nodes. Design techniques for key building blocks, such as sensor interfaces, timing reference, data communication, energy harvesting, and power management are reviewed. In particular, Part I introduces analog circuit techniques and sensor interfaces for miniatu...

We consider a simple configuration for realizing one-dimensional slow-light metamaterials with large bandwidth-delay products using stub-shaped Fabry-Perot resonators as building blocks. Each meta-atom gives rise to large group indices because of a classical analog of the dressed-state picture of electromagnetically induced transparency. By connecting up to eight meta-atoms, we find bandwidth-d...

This paper presents the characterization and synthesis results for a hardware implementation of a reconfigurable digital logic cancellation circuit auxiliary for multi-mode Σ∆ modulator that is capable to perform the analog-to-digital conversion for GSM, CDMA and WLAN standards. The Σ∆ modulator reconfigures its mash topology and building blocks in order to adapt the performance to the diverse ...

Oversampling Sigma Delta ADC (Analog to Digital) Converters are the key building blocks of wireless transceivers. In sigma delta modulator design,the scaling coefficients determine the peak signal-to-noise ratio. So selecting the optimum value of the coefficient is necessary. And therefore GA (Genetic Algorithm) is used for optimizing the coefficients. The performance of the design is analyzed ...

In this chapter, we introduce a highly expressive, self-contained reflective meta-model of object-process methodology (OPM). OPM enables universal system modeling based on the notions of processes that transform objects. Extending the object-oriented approach, which views processes as residents of objects, OPM provides for the existence of stand-alone processes that can represent transformation...

We present our Component-Based Agent Framework, which enables a software engineer to design a set of agents by using a visual compo nent-based toolkit (Sun’s BDK), and wiring together desired blocks of functionality. We instantiate this framework in the RoboCup domain by implementing the necessary components. The implementation also serves as a proof of the viability of our framework. Finally, ...

Figure 3. The four terms PPij, PSij, SPij, and SSij “wrap around” the excluded center cell i,j to cover the shaded region. Figure 2. The prefix algorithm. The prefix and suffix sums Pi ,Si are computed as cumulative sums starting from the left and from the right. The excluded sum is then Pi–1 + Si+1. If we peel away, layer by layer, the complexities of the fast multipole method, we find that it...