1 Jan Chojcan, Silesian University of Technology, Gliwice POLAND, passed away on June 8 2 Jacek Izydorczyk, Silesian University of Technology, Gliwice POLAND, [email protected] 3 Grzegorz Dziwoki, Silesian University of Technology, Gliwice POLAND, [email protected] Abstract  Faculty of Automatic Control, Electronics and Computer Science of the Silesian University o...

Two matrix equations, Pascal matrix equation and inverse Pascal matrix, are derived and demonstrated in this work. These matrix equations are used for making a conversion and inversion between the coefficients of an analog low pass filter transfer function H(s) and a digital transfer function H(z). The involving of the Pascal’s triangle in both matrix equations is helpful, easier to transform b...

In this paper a methodology is presented that automates the analog/digital partitioning in lowpower signal processing applications. The methodology is illustrated with the high-level design of the baseband signal processing circuits of a direct conversion receiver. The optimal translation of system-level speci cations into sub-block speci cations is performed at the same time while computing th...

Current mode circuits cover an important area of application like filters, neural networks and analog-digital conversion. Current mode circuits, because of their special structure, need appropriate methodology during design process. This paper is an overview of most common problems related with analog and mixed digital-analog converters and filters performed in a CMOS technology. Laboratory mea...

NTSC composite color video is currently one of the most common formats of video broadcasting. Although the signal is analog, it can be decoded almost entirely digitally. Analog decoders offer limited video quality and require adjustments. Using digital techniques to implement NTSC decoding offers minimum adjustments and excellent video quality. This project presents the building blocks of digit...

Two-step flash architectures are an effective means of realizing high-speed, high-resolution analog-to-digital converters (ADC’S) because they can be implemented without the need for operational amplifiers having either high gain or a large output swing. Moreover, with conversion rates approaching half those of fully parallel designs, such half-flash architectures provide both a relatively smal...

This paper describes a VHDL implementation of a behavioural model for novel programmable resolution analog to digital converters (ADCs). This architecture uses the dichotomic method in the conversion. The goal for using this VHDL description is to validate the algorithm conversion and facilitate the synthesis of the digital part. In this example it includes digital control of dichotomic method....