Analog-to-digital (A/D) converters are critical components in many space and military systems, and there have been numerous advances in A/D converter technology that have increased the resolution and conversion time. The increased perfonnartce is due to two factors: (1) advances in circuit design and complexity, which have increased the number of components and the integration density; and (2) ...

A highly linear 600 MHz centre frequency, 500 MHz bandwidth 6 order Butterworth bandpass filter using a LeapFrog Gm-C topology is designed. Fully differential inverter based Operational Transconductance Amplifier (OTA) with common-mode feedback (CMFB) and common-mode feed forward (CMFF) circuit is used in the design. Cadence tool has been used on IHP SiGe BiCMOS 0.25 μm node. The filter consume...

Error correcting decoder’s performance is crucial for communication systems. Since the performance of Turbo codes is close to the Shannon limit, ultra high-speed turbo decoder is desired. The aim of this design is to demonstrate the feasibility of implementing high-speed Turbo decoders in analog VLSI using SiGe BiCMOS technology. Detailed conceptual design is presented. Simulation results show ...

The single-polysilicon non-self-aligned bipolar transistor in a 0.5-pm BiCMOS technology bas been converted into a double-polysilicon emitter-base self-aligned bipolar transistor with little increase in process complexity. Improved bipolar performance in the form of smaller base resistance and base-collector capacitance, larger knee current, higher peak cutoff frequency, and shorter ECL gate de...

A 128-channel pulse-swallow frequency synthesizer includes a 3-mW VCO, a 2.2-mW 16/17 dual-modulus prescaler, a 9-b program counter, and a 7-b swallow counter. The circuit is fully integrated with the exception of the loop-filter capacitor. The ECL prescaler incorporates current sharing and circuit stacking techniques to reduce power consumption. Fabricated in a 1m, 20-GHz BiCMOS process, the c...

This paper presents a switched-capacitor multibit ADC delta–sigma modulator for baseband demodulation integrated in a single-chip Bluetooth radio-modem transceiver that achieves 77 dB of signal-to-noise-plus-distortion ratio (SINAD) and 80 dB of dynamic range over a 500-kHz bandwidth with a 32-MHz sample rate. The 1-mm circuit is implemented in a 0.35m BiCMOS SOI process and consumes 4.4 mA of ...

We describe a programmable capacitor technology under development at NCSU and its potential application in building programmable interconnect devices useful for system level connectivity functions, phased array beam steering, and RF switching. Crossbars are made from arrays of electrostatically controlled bistable MEMS-based capacitors. These new devices allow faster signaling and consume less ...

An ultra-low-power, 4-channel 2 – 1 PRBS generator with 60 mW per channel was designed, fabricated and measured to work up to 23 Gb/s. The circuit is based on a 2.5-mW BiCMOS CML latch topology, which, to the best of our knowledge, represents the lowest power for a latch operating above 10-Gb/s. The chip also includes an integrated PRBS checker and error counter.

The pertinent literature on low voltage Operational Amplifiers is surveyed and techniques suitable for operation at low power supply voltages are identified. Designs implemented in standard Bipolar, BiCMOS, and CMOS technologies are classified and characterized. The lower limit of the power supply voltage is identified as well as the performance tradeoffs that are sacrificed as that limit is ap...