In heterogeneous tiled System-on-Chip architectures a Network-on-Chip is used to transport messages between processing elements. A reconfigurable network interface is used to connect the processing elements to the Network-on-Chip, converting the messages between both domains. This paper introduces the Hydra: a network interface for the MONTIUM TP, a coarse-grained reconfigurable processor desig...

Memory and global interconnect dominate the cost, power and performance of Embedded System on Chip (SOC) architectures. We contend that most of the architectural innovations being pursued today do not directly address these challenges. Move Logic Not Data is a scalable architectural concept where the movement of data is minimal. The logic that transforms/creates data is instead brought to the d...

Network-on-chip-based multiprocessor systems-on-chip (NoC-based MP-SoCs) are considered as future embedded systems platforms. One of the steps in mapping an application onto such a parallel platform involves determining when data is sent between the tasks in the application. As a network-on-chip allows concurrent communication, a decision on the route through the network must also be made. Timi...

This paper reports, for the first time, the use of endoscopy for the nondestructive examination of solder joint integrity in chip scale packages (CSP) such as flip chip on flex (FCF). Borrowed from the medical instrument technology, the endoscope is used to examine visually the inside of an organ. This concept has now been developed and refined by ERSA and KURTZ, and led to an ERSASCOPE inspect...

A network-based analysis of systemic inflammation in humans. Nature. 2005 Aug 31 as doi: 10.1038/nature03985. Steve E. Calvano, Wenzhong Xiao, Daniel R. Richards, Ramon M. Felciano, Henry V. Baker, Raymond J. Cho, Richard O. Chen, Bernard H. Brownstein, J. Perren Cobb, S. Kevin Tschoeke, Carol Miller-Graziano, Lyle L. Moldawer, Michael N. Mindrinos, Ronald W. Davis, Ronald G. Tompkins, Stephen ...