This paper presents the designing of a fully differential folded cascode operational transconductance amplifier (OTA) with common mode feedback circuit (CMFB). The designed OTA is operated in sub-threshold region to reduce the power consumption. The simulation is carried out in CADENCE environment using 150nm CMOS. The simulation result shows the DC gain of 82 dB with UGBW of 768 KHz, CMRR of 1...

A fully integrated differential class-AB power amplifier has been designed in a 0.25um CMOS technology. It is intended for medium output power ranges such as Bluetooth class I, and has an operating frequency of 2.45GHz. By using two parallel output stages that can he switched on or off, a high efficiency can be achieved for both high and low output power levels. The simulated maximum output pow...

Negative conductance voltage gain enhancement techniques which substantially increases the dc gain of an operational amplifier without degrading speed are discussed. Three fully differential CMOS op amps using the negative conductance gain enhancement technique are presented. Simulations show that for a 0.35um CMOS technology with a power supply of 3V, a dc gain of more than 94dB is achievable ...

This paper discusses the use of a low gain amplifier and a passive switched-capacitor (SC) network to enable the SC integrator function. The method is applied to a deltasigma modulator to achieve high resolution as proved by the 65-nm CMOS technology test vehicle. Compared with the conventional operational amplifier (op-amp)-based SC integrator, this solution utilizes a low-gain open-loop ampli...

The radio-frequency (rf) performance of a 0.18m CMOS logic technology is assessed by evaluating the cutoff and maximum oscillation frequencies ( and max) the minimum noise figure ( min) and associated power gain ( ) and the 1/ -noise of the devices. Gate-biasing and channel-length and gate-finger-length adjustments are identified as means to optimize the rf performance without any technology pr...

−The design and implementation of a CMOS continuous-time follow−the−leader−feedback (FLF) filter is described. The filter is implemented using a fully−differential linear, low voltage and low power consumption operational transconductance amplifier (OTA) based on a source degeneration topology. PSpice simulations using a standard TSMC 0.18μm CMOS process with 2V power supply have shown that the...

This CMOS voltage sense amplifier or comparator is designed by adding dual input single output differential amplifier which is added in place of back-to-back inverter in the latch stage. This method is used to completely remove the input noise present in the circuit. Using this dual input single output differential amplifier the analog-to-digital conversions with high speed, lower power dissipa...