نتایج جستجو برای: demultiplexer
تعداد نتایج: 437 فیلتر نتایج به سال:
A series of complex logic gates were constructed based on graphene oxide and DNA-templated silver nanoclusters to perform both arithmetic and nonarithmetic functions. For the purpose of satisfying the requirements of progressive computational complexity and cost-effectiveness, a label-free and universal platform was developed by integration of various functions, including half adder, half subtr...
Low power and high speed digital circuits are basic needs for any of digital circuit; De-multiplexer is a basic circuit for any digital circuit. In this paper demultiplexer has been designed using CMOS, transmission gate pseudo nmos logic. The performance of designs has been compared in terms of power consumption, delay and transistor counts. The proposed design demonstrates the superiority in ...
We report on a five-channel wavelength-division demultiplexer using substrate-guided waves in conjunction with a polymer-based Littrow hologram operating at 700, 710, 720, 730, and 740 nm. An average cross talk of -40 dB between adjacent channels is measured. Diffraction efficiencies of 69%, 78%, 83%, 77%, and 69% are both experimentally and theoretically confirmed for the five-channel device. ...
We demonstrate the first integrated transmitter for serial 100 Gb/s NRZ-OOK modulation in datacom and telecom applications. The transmitter relies on the use of an electro-optic polymer modulator and the hybrid integration of an InP laser diode and InP-DHBT electronics with the polymer board. Evaluation is made at 80 and 100 Gb/s through eye-diagrams and BER measurements using a receiver module...
An improved time caliper method has been proposed for measuring a small relative delay of two signals transmitted on different channels. This is achieved by using a new method to generate two periodic pulse trains that have much smaller period difference, over 1000 times smaller than that in the prior scheme. The two pulse trains, with a period difference of 0.1 ps, are generated by an arbitrar...
We describe a superparallel holographic optical correlator that performs two-dimensional spatial and angular multiplexing simultaneously. The key step in this architecture is the use of a holographic multiplexer to split a query image into many copies before it applies them to the holographic database. A holographic demultiplexer, in conjunction with an aperture, is used to identify the locatio...
Application of terahertz optical asymmetric demultiplexer (TOAD) in ultrafast all-optical switching has received a great deal of interest in the last few years because of its simplicity and low switching energy [1]. However, existing TOAD switches see Fig. 1(a), suffer from asymmetrical switching window (SW) profile that results in high crosstalk, which in turn affects the bit error rate (BER) ...
A numerical simulation of the switching characteristics of a polarization multiplexed nonlinear-optical loop mirror demultiplexer is presented and compared with experiment. The model assumes that the optical fiber that composes the loop has a randomly varying birefringence, that the signal and the control pulses have the same frequency, and that these pulses are nearly solitons. Factors that af...
In this paper we study the problem of the optimal design of bu er management policies for a shared memory ATM switch or demultiplexer fed by tra c containing two different space priorities. We present the properties of the optimal policy within the class of pushout and expelling policies that minimizes total weighted cell loss. A numerical study of the optimal policies for small bu er sizes bas...
We demonstrate a novel on-chip two-mode division multiplexing circuit using a tapered directional coupler-based TE(0)&TE(1) mode multiplexer and demultiplexer on the silicon-on-insulator platform. A low insertion loss (0.3 dB), low mode crosstalk (< -16 dB), wide bandwidth (~100 nm), and large fabrication tolerance (20 nm) are measured. An on-chip mode multiplexing experiment is carried out on ...
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