Computing systems are vulnerable to anomalies that might occur during execution of deployed software: e.g., faults, bugs or deadlocks. When occurring on embedded computing systems, these anomalies may severely hamper the corresponding devices; on the other hand, embedded systems are designed to perform autonomously, i.e., without any human intervention, and thus it is difficult to debug an appl...

Automatic memory management techniques eliminate many programming errors that are both hard to find and to correct. However, these techniques are not yet used in embedded systems with hard realtime applications. The reason is that current methods for automatic memory management have a number of drawbacks. The two major ones are: (1) not being able to always guarantee short real-time deadlines a...

The growing gap between processor and memory speeds makes memory issues a major bottleneck in the design of systems-on-silicon. When the system is designed for a targeted application (as is the case with embedded systems-onsilicon), several strategies can be employed to resolve this memory bandwidth bottleneck, including reorganization of data, exploiting locality of reference to tune the memor...

In this paper we describe a multi-module, multi-port memory design procedure that satisfies area and/or energy constraints for embedded applications. Our procedure consists of application of loop transformations and reordering of array accesses to reduce the memory bandwidth followed by memory allocation and assignment procedures based on ILP models and heuristic-based algorithms. The specific ...

Bytecode-based Middleware and virtual execution environments have become popular in development for embedded Systems. The ECMA/ISO Common Language Infrastructure (CLI) specifies a bytecode-based execution environment (Common Language Runtime) and a comprehensive class library. As Microsoft’s CLI implementation the .NET Compact Framework was built for high-end mobile devices. It would be reasona...

Low power realization of video applications on embedded cores is described. Code transformations are applied to reduce the data memory power consumption. The transformed code indicates a power efficient data memory architecture while transformations move the main part of memory accesses from larger memories (possibly off-chip) to smaller ones (on-chip). The effect of transformations on performa...

This article provides an overview of a series of event-cueing experiments conducted to investigate how autobiographical memory is organized at the event level. In these experiments, participants ®rst generate a set of personal events (cueing events) and then respond to each by retrieving a second event memory (the cued event). Subsequently, relations between cued and cueing events are coded, an...

Due to the thriving of the mobile devices market, there has been a great momentum in adopting Java technology in embedded mobile devices where optimizing energy consumption is extremely critical. However, since Java Virtual Machines (JVMs) are conventionally used for server side clusters, the energy and memory tradeoff on embedded devices are not well understood. In this work, we attempt to fin...

Many of today’s chips demand more embedded memory than ever before. SoCs and FPGAs are also moving from logic-dominant to memory-dominant chips. The addition of memory, while it creates a more powerful chip, increases die size and results in poor yield. As the percentage of embedded memory continues to increase, so does the chip’s complexity, density, speed and of course, the probability of fai...

The Connected Component Tree (CCT)-based operators play a central role in the development of new algorithms related to image processing applications such as pattern recognition, video-surveillance or motion extraction. The CCT construction, being a time consuming task (about 80% of the application time), these applications remain far-off mobile embedded systems. This paper presents its efficien...