نتایج جستجو برای: fault tolerant logic gates
تعداد نتایج: 247442 فیلتر نتایج به سال:
Today ion traps are among the most promising physical systems for constructing a quantum device harnessing the computing power inherent in the laws of quantum physics1, 2. The standard circuit model of quantum computing requires a universal set of quantum logic gates for the implementation of arbitrary quantum operations. As in classical models of computation, quantum error correction technique...
How to reconfigure a logic gate for a variety of functions is an interesting topic. In this paper, a different method of designing logic gates are proposed. Initially, due to the training ability of the multilayer perceptron neural network, it was used to create a new type of logic and full adder gates. In this method, the perceptron network was trained and then tested. This network was 100% ac...
This paper describes a highly accurate but eecient fault simulator for interconnect opens in combinational or full-scan digital CMOS circuits. The analog behavior of the wires with interconnect opens are modeled very eecently in the vicinity of the defect in order to predict what logic levels the fanout gates will interpret, and whether a suucient IDDQ current will be owing inside the fanout ga...
Fault-tolerant quantum computation is a basic problem in quantum computation, and teleportation is one of the main techniques in this theory. Using teleportation on stabilizer codes, the most well-known quantum codes, Pauli gates and Clifford operators can be applied fault-tolerantly. Indeed, this technique can be generalized for an extended set of gates, the so called Ck hierarchy gates, intro...
A general design technique for achieving single faulttolerant asynchronous sequential circuits is described. The design procedures apply over a large range of fault conditions and are extremely easy to use. Generally, less than three times the logic required for a single copy is needed to achieve single fault tolerance. In addition to fault tolerance, real time fault detection is easily achieve...
Published work on stuck-at fault test generation nearly exclusively considers circuits composed of only binary logic gates. Industrial designs commonly contain three-state elements , such as: busses and drivers, transmission gates, and bidirectional I/O. This paper presents extensions to state-of-the-art ATPG algorithms in order to handle these elements. A 25-valued signal model is used for tes...
Stabilized cat codes can provide a biased noise channel with set of bias-preserving (BP) gates, which significantly reduce the resource overhead for fault-tolerant quantum computing. All existing schemes BP however, require adiabatic evolution, performance limited by excitation loss and nonadiabatic errors during gates. In this paper, we apply derivative-based leakage-suppression technique to o...
Quantum computation is a recently-introduced and novel computing technique which is based on quantum mechanics rather than classical physics. Its starting point is the notion of a quantum bit or “qubit”. Because of the superposition property of quantum states, n qubits can store 2 n numbers simultaneously, implying a type of massive parallelism. Furthermore, quantum states allow powerful forms ...
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