Long Term Evolution (LTE) is an advanced standard of the mobile communication systems. LTE has been developed by the 3 Generation Partnership Project (3GPP). The new features exhibited by LTE is a direct impact of applying new modulation and coding techniques such as the Orthogonal Frequency Division Multiplexing (OFDM) for the Downlink and the Single Carrier Frequency Division Multiple Access ...

We present the design of a Clifford algebra co-processor and its implementation on a Field Programmable Gate Array (FPGA). To the best of our knowledge this is the first such design developed. The design is scalable in both the Clifford algebra dimension and the bit width of the numerical factors. Both aspects are only limited by the hardware resources. Furthermore, the signature of the underly...

Abstract— We present an efficient implementation of a coded modulation for the deep space optical channel. NASA designed this so called serially concatenated pulse position modulation (SCPPM) code to provide an optical link that can operate within one dB signal energy of the Shannon capacity during a nominal mission condition from Mars. Here, we describe some of the challenges in realizing the ...

In this paper, we present suitable design optimization for area-delay efficient implementation of finite impulse response (FIR) filter on Field Programmable Gate Array (FPGA). Architectural optimization done in MATLAB/Simulink environment, Hardware description language (HDL) netlist produced by System Generator enables emulation on FPGA and also serves as design entry for chip realization. The ...

Efficient implementation of double point multiplication is crucial for elliptic curve cryptographic systems. We revisit three recently proposed simultaneous double point multiplication algorithms. We propose hardware architectures for these algorithms, and provide a comparative analysis of their performance. We implement the proposed architectures on Xilinx Virtex-4 FPGA, and report on the area...

The evolution of field programmable gate arrays (FPGAs) as custom-computing machines for digital signal processing (DSP), real-time embedded and reconfigurable systems development, embedded processors, and as co-processors for application specific integrated circuit (ASIC) prototyping has led to the emergence of several modeling and design methodologies among which are the register transfer lev...

This paper describes an evolvable image filter which is completely implemented in a field programmable gate array. The proposed system is able to evolve an image filter in a few seconds if corrupted and original images are supplied by user. The architecture is generic and can easily be modified to realize other evolvable systems. COMBO6 card with Xilinx Virtex xc2v3000 FPGA is used as a target ...

This paper presents the design and implementation of a new digital-to-time converter (DTC). The obtained resolution is 1.02 ps, and the dynamic range is about 590 ns. The experimental results indicate that the measured differential nonlinearity (DNL) and integral nonlinearity (INL) are −0.17~+0.13 LSB and −0.35~+0.62 LSB, respectively. This DTC builds coarse and fine Vernier delay lines constru...

Many optimization problems have complex search space, which either increase the solving problem time or finish searching without obtaining the best solution. Genetic Algorithm (GA) is an optimization technique used in solving many practical problems in science, engineering, and business domains. Parallel Genetic Algorithm (PGA) has been widely used to increase speed of GA, especially after the ...

A comparison of linear and quadratic transform implementation on field programmable gate array (FPGA) is presented. Popular namely Stockwell Transform Smoothed Pseudo Wigner Ville Distribution (SPWVD) from Quadratic transforms considered for the FPGA. Both are coded in Verilog hardware description language (Verilog HDL). Complex calculations transformation performed by using CORDIC algorithm. F...