In this paper, a nontrivial sampling clock imperfection analysis is presented for Synthetic Aperture Interferometric Radiometers (SAIR). Sampling clock determines the edges at which analog radiometric demodulated signal are digitized for digital correlation, and its jitter and skew could lead to SAIR performance degradations. Firstly, the jitter and skew contributions to visibility uncertainty ...

| Constant Bit Rate (CBR) traac is expected to be a major source of traac in high-speed networks. Such sources may have stringent delay and loss requirements and in many cases, they should be delivered exactly as they were generated. A simple delay priority scheme will bound the cell delay and jitter for CBR streams, so that in the network switches, CBR traac will only compete with other CBR tr...

On-chip Jitter induced by switching chip logic is often the reason why a device fails to achieve high operating frequency, or low bit error rate (BER). Therefore, research of on-chip Jitter is crucial for high speed design. In this paper, the method for measurement of on-chip Jitter is described. Using this method Jitter is studied in Frequency, Time, Spatial domains, and versus Decoupling. It ...

The paper presents a method, which can be employed to measure the timing jitter present in periodic clock signals that are used as entropy source in true random number generators aimed at cryptographic applications in reconfigurable hardware. The method uses the principle of a coherent sampling and can be easily implemented inside the chip in order to test online the jitter source. The method w...

Position and angle jitter of the beams at the interaction point are important sources of luminosity degradation in future linear colliders. In order to reduce their effect, intrapulse feedback can be used. Some simulations are presented to evaluate a position feedback at the interaction point. The influences of angle jitter onto this feedback are investigated and possible fixes are discussed. A...

In this paper, we present worst-case and best-case execution times and (absolute) execution jitter analysis of independent, periodically activated, hard real-time tasks that are executed on a single processor under fixed-priority pre-emptive scheduling (FPPS), arbitrary phasing, (absolute) activation jitter, and deadlines at most equal to (worst-case) periods minus activation jitter. We prove t...

Recent advancements in communication systems design place strict demand on system timing accuracy. As frequencies approaches 1GHz, and beyond designers are required to pay special attention to timing variations. Jitter has become a familiar parameter to designers as system speeds accelerate. Jitter is usually characterized in the time domain via metrics such as deterministic jitter, random jitt...

OBJECTIVES To compare voice parameters in subjects with different hearing level. METHODS The evaluation consisted of Multi-Dimensional Voice Program (MDVP) and electroglottography. Group 1 consisted of normal hearing subjects which is bilateral average hearing better than 25 decibels (dB) whereas group 2 consisted of patients who have bilateral average hearing between the 25 and 60 dB and gro...

Abstract In a high-speed sampling system, the clock jitter of analog-to-digital converters (ADCs) will greatly affect its accuracy, leading to reduction signal-to-noise ratio (SNR) system output. Therefore, it is necessary compensate results reduce error caused by measuring distribution sequence jitter. this paper, influence on ADC process analyzed, and an measurement scheme based simple cohere...