The design of various high-speed interface architectures for off-chip connections to and from analog, iterative VLSI decoders is discussed. It is shown that for applications with high transmission rates and low to medium accuracy, MOSFET-only R-2R ladders in combination with switched-current memory cells are ideally suited, due to their current mode nature as well as their power and area effici...

For VLSI application-specific a m y s and other regular VLSI circuits, two techniques are available for yield enhancement, namely defect-tolerance and layout modifications. In this paper, we compare these two yield enhancement appruaches by using adders as an ezample. Our yield projections indicate that the layout modification technique is more eficient when the defect density is low, while rec...

of the Dissertation Energy-Efficient VLSI Signal Processing for Multi-Band MIMO Systems

In Greece, up until now, monoculture has been the prevailing fish and shellfish farming system. However, in the last few years, the farmers seek to develop alternative production patterns that could improve the economic performance of their farms through the optimal utilisation of the available resources. The concept of integrated aquaculture is old; however during the last 30 years many author...

The 8-queens problem is a well-known chessboard problem, whose constraints are to place eight queens on a normal chessboard in such a way that no two attack each other, under the rule that a chess queen can attack other pieces in the same column, row, or diagonal. This problem can be generalized to place n queens on an n by n chessboard, otherwise known as the n-queens problem. The mathematicia...

It is important to recognize that several years of hands on experience are required for one to become a true test expert. However, it is critical to ensure that students are equipped with the skills that will make them successful designers when they leave their academic institutions. Fundamentals of VLSI design and testability would provide them with a solid foundation to build upon going forward.

Low power chip requirement in the VLSI industry is main considerable field due to the reduction of chip dimension day by day and environmental factors. In this paper various low power techniques at Gate level, Architecture level and different tradeoffs between different clock distribution schemes like as single driver clock scheme and distributed buffers clock scheme are reviewed. Here it is al...

An analog CMOS VLSI neural processing chip has been designed and fabricated. The device employs "pulse-stream" neural state signalljng, and is capable of computing some 360 million synaptic connections per secood. In addition to basic characterisation results. the performance of the chip in solving "real-world" problems is also demonstrated.