The current version of IEEE 802.15.4 MAC protocol does not support energy-efficient mobility for the low-power device. In this paper, we propose an energy-efficient sleep mode as part of the IEEE 802.15.4 that can conserve energy by considering mobility of mobile sensor devices. The proposed energy-efficient sleep mode dynamically extends the sleep interval if there is no data to transmit from ...

The long term goal of this research is to develop high-frequency broadband acoustical scattering techniques to remotely and autonomously characterize zooplankton distribution, size, abundance, and community structure, on ecologically relevant spatial and temporal scales. In order to achieve this goal, an autonomous, compact, low-power, high-frequency, broadband acoustical backscattering system ...

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An overview of clocking and design of clocked storage elements is presented. Systematic design of Flip-Flop is explained as well as “time borrowing” and absorption of clock uncertainties. We show how should different clocked storage elements be compared against each other. The issues related to power consumption and low-power design are presented.

A current measurement configuration for the estimation of the power consumption of processing systems is presented in this work. The problem addressed is to measure the variations of the power supply current of digital circuits (and especially of embedded processing circuits) and to calculate from these measurements the energy consumption variations associated with certain tasks performed by th...

Two’s complement signal representation is widely used in the implementation of arithmetic operations. However, it is well-known that its sign-extension can cause undesirable signal transitions in the MSBs of a data-path circuit. We propose a novel technique to reduce the signal transitions due to sign-extension while retaining the simplicity of the two’s complement arithmetic operations. The ke...

This work describes the design of a divder technique Low-power techniques are applied in the design of the unit, and energy-delay tradeoffs considered. The energy dissipation in the divider can be reduced by up to 70% with respect to a standard implementation not optimized for energy, without penalizing the latency. In this dividing technique we compare the radix-8 divider is compared with one ...

Low-Power Domain-Specific Processors for Digital Signal Processing

This paper introduces an efficient hardware approach to reduce the register file energy consumption by turning unused registers into a low power state. Bypassing the register fields of the fetch instruction to the decode stage allows the identification of registers required by the current instruction (instruction predecode) and allows the control logic to turn them back on. They are put into th...